2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05)
DOI: 10.1109/asap.2005.43
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Logic Models Supporting the Design of MOBILE-based RTD Circuits

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Cited by 11 publications
(19 citation statements)
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“…This concept was presented by Avedillo et al [2,3] and Berezowski [4]. They proposed to build circuits from the serially connected NDR l and NDR d paralleled by branches of a single NDR-transistor pair [2] or a single NDR serially connected with serial-parallel (SP) transistor network [3,4]. In this paper we extend the concept presented in [4], propose a modified model of the GTG circuit, prove that GTG enables to implement any n-variable boolean function, and give a GTG synthesis algorithm.…”
Section: Introductionmentioning
confidence: 93%
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“…This concept was presented by Avedillo et al [2,3] and Berezowski [4]. They proposed to build circuits from the serially connected NDR l and NDR d paralleled by branches of a single NDR-transistor pair [2] or a single NDR serially connected with serial-parallel (SP) transistor network [3,4]. In this paper we extend the concept presented in [4], propose a modified model of the GTG circuit, prove that GTG enables to implement any n-variable boolean function, and give a GTG synthesis algorithm.…”
Section: Introductionmentioning
confidence: 93%
“…selecting parameters of NDR elements) for a given boolean function. Successive paper by Avedillo et al [3] proposed a modified structure that utilises one or many, serially connected transistors to switch each NDR element. This allows to implement all n-variable boolean functions, however, extends the set of input variables yielding circuit of up to 2 n + 1 branches.…”
Section: Motivation and Previous Workmentioning
confidence: 99%
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