Logic Design Automation of Fan-In Limited NAND Networks

Multilevel logic synthesis

“…The problem of "optimum" factoring and decomposition has been the object of intense study in the past, but the number of proposed techniques which are practical for large networks (e.g., more than 1000 gates) is limited. The techniques reviewed here are the optimum NAND-gate synthesis of Dietmeyer and So [40], and the algebraic approach of [23] and [15].…”

“…One of the first techniques practical for large circuits is the factoring technique of Dietmeyer and Su [40]. Their technique starts with a minimized sum-of-products representation of a single-output function.…”

Logic synthesis and a generalized notation for memristor-realized material implication gates

“…In particular, the synthesis methods such as Sum-of-Products networks (SOP), Product-of-Sums (POS), TANT and NAND networks [6,7,8,21], linear, bidecomposition [19], Ashenhurst-Curtis decomposition [1], Reed-Muller, Exclusive-Or-Sum-of_Products (ESOP) [20] and negative gate circuit [9] synthesis methods can be adopted. We have been initially comparing them on several types of single-output functions such as unate functions, parity functions and affine functions of many variables, cyclic functions, non-cyclic, balanced and self-dual functions.…”

Design of a logic synthesis system (tutorial)

“…A cube factor [8] is a logic factor which is a simple product of literals. For example, given: F = ade + bdeh + cde + f G = bgh + cg + dg + aef H = aeg + bc the cube factor X = ae can simplify the equations to: F = aed + bdeh + cde + f G = bgh + cg + dg + Xf H = Xg+bc A kernel [4] is a sum-of-products logic factor.…”