Linear Scaling of Reset Current Down to 22-nm Node for a Novel $\hbox{Cu}_{x}\hbox{Si}_{y}\hbox{O}$ RRAM

Li, Yang; Song, Yali; Liu, Y.; Wang, Y. L.; Tian, Xiaopeng; Wang, M.; Lin, Yandan; Huang, Rongqin; Zou, Qingtian; Wu, Jingang

doi:10.1109/led.2011.2170654

Cited by 26 publications

(15 citation statements)

References 6 publications

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“…However, Ni top electrodes (TEs) are difficult to etch using conventional dry‐etching processes because of the nonvolatility of the by‐products . In addition, to date, the scaling effect on the memristor characteristics in various resistive switching materials are reported less frequently, and memristor switching in silicon nitride‐ and silicon oxide‐based metal–insulator–semiconductor (MIS) systems have been reported for only large sizes (≈1 µm) . In this study, Ti/SiN x /p + ‐Si devices with sizes ranging from 10 µm to 60 nm on the same wafer were fabricated to investigate the scaling effect on the memristor switching characteristics.…”

Section: Introductionmentioning

confidence: 99%

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

Kim

Jung

Kim

et al. 2018

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A feasible approach is reported to reduce the switching current and increase the nonlinearity in a complementary metal-oxide-semiconductor (CMOS)-compatible Ti/SiN /p -Si memristor by simply reducing the cell size down to sub-100 nm. Even though the switching voltages gradually increase with decreasing device size, the reset current is reduced because of the reduced current overshoot effect. The scaled devices (sub-100 nm) exhibit gradual reset switching driven by the electric field, whereas that of the large devices (≥1 µm) is driven by Joule heating. For the scaled cell (60 nm), the current levels are tunable by adjusting the reset stop voltage for multilevel cells. It is revealed that the nonlinearity in the low-resistance state is attributed to Fowler-Nordheim tunneling dominating in the high-voltage regime (≥1 V) for the scaled cells. The experimental findings demonstrate that the scaled metal-nitride-silicon memristor device paves the way to realize CMOS-compatible high-density crosspoint array applications.

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Section: Introductionmentioning

confidence: 99%

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

Kim

Jung

Kim

et al. 2018

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“…For RRAM, I reset depends inversely on the R on of device [9]. Furthermore, in any case, the decrease of the I reset is achieved through the increase of the R on .…”

Section: The Drastic Reduction Of Reset Current and Improvement Of Dementioning

confidence: 99%

“…From the viewpoint of the fabrication process, reducing device area is an effective method for lower I reset [1,8,9]. From the viewpoint of the resistive switching mechanism, in many cases, resistive switching is attained by formation and rupture of conductive filaments in metal oxide film.…”

Section: Introductionmentioning

confidence: 99%

Drastic reduction of RRAM reset current via plasma oxidization of TaOx film

Chen

Feng

Bae

2015

Applied Surface Science

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“…On the other hand, the switching behavior of VCM is triggered by the drift of oxygen anions [7,8]. The copper-based CBRAM, which takes the advantage of the copper plug or copper line as the electrode, is a favorable choice with respect to cost-effective fabrication [9-11]. According to the CF model of CBRAM, the data retention is related with the diffusion of metal species [12,13].…”

Section: Introductionmentioning

confidence: 99%

Investigation of LRS dependence on the retention of HRS in CBRAM

Liu

et al. 2015

Nanoscale Res Lett

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The insufficient retention prevents the resistive random access memory from intended application, such as code storage, FPGA, encryption, and others. The retention characteristics of high resistance state (HRS) switching from different low resistance state (LRS) were investigated in a 1-kb array with one transistor and one resistor configuration. The HRS degradation was found strongly dependent on the LRS: the lower the resistance of the LRS (RLRS) is, the worse HRS retention will be. According to the quantum point contact model, the HRS corresponds to a tiny tunnel gap or neck bridge with atomic size in the filament. The degradation of HRS is due to the filling or widening of the neck point by the diffusion of copper species from the residual filament. As the residual filament is stronger in case of the lower RLRS, the active area around the neck point for copper species diffusion is larger, resulting in higher diffusion probability and faster degradation of HRS during the temperature-accelerated retention measurement.

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Linear Scaling of Reset Current Down to 22-nm Node for a Novel $\hbox{Cu}_{x}\hbox{Si}_{y}\hbox{O}$ RRAM

Cited by 26 publications

References 6 publications

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

Scaling Effect on Silicon Nitride Memristor with Highly Doped Si Substrate

Drastic reduction of RRAM reset current via plasma oxidization of TaOx film

Investigation of LRS dependence on the retention of HRS in CBRAM

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