Light-Triggered Ternary Device and Inverter Based on Heterojunction of van der Waals Materials

Abstract

Multivalued logic (MVL) devices/circuits have received considerable attention because the binary logic used in current Si complementary metal-oxide-semiconductor (CMOS) technology cannot handle the predicted information throughputs and energy demands of the future. To realize MVL, the conventional transistor platform needs to be redesigned to have two or more distinctive threshold voltages (Vs). Here, we report a finding: the photoinduced drain current in graphene/WSe heterojunction transistors unusually decreases with increasing gate voltage under illumination, which we refer to as the light-induced negative differential transconductance (L-NDT) phenomenon. We also prove that such L-NDT phenomenon in specific bias ranges originates from a variable potential barrier at a graphene/WSe junction due to a gate-controllable graphene electrode. This finding allows us to conceive graphene/WSe-based MVL logic circuits by using the I-V characteristics with two distinctive Vs. Based on this finding, we further demonstrate a light-triggered ternary inverter circuit with three stable logical states (ΔV of each state <0.05 V). Our study offers the pathway to substantialize MVL systems.

Carrier Transport and Photoresponse in GeSe/MoS2 Heterojunction p–n Diodes

“…The peak current increases with increasing V ds because of more effective carrier collection, as shown in Figure S4 (Supporting Information). However, the V cg does not show a corresponding shift, unlike previously reported light‐triggered NDT . The PVR value in the high gate voltage range is around 10, however, it can be further improved by modifying the channel area and thickness of GeSe and MoS 2 .…”

“…The temperature dependence of I ds cannot be simply explained by the traditional thermionic‐emission model that assumes a constant barrier height. We applied the modified thermionic‐emission theory with consideration of the diffusion mechanism, because of the long‐channel distance (≈24 µm) . Here, the effective barrier height ϕ eB is described as where ϕ B is a barrier height, k B is the Boltzmann constant, T is temperature, and σ is the distribution of barriers.…”

“…The PVR value in the high gate voltage range is around 10, however, it can be further improved by modifying the channel area and thickness of GeSe and MoS 2 . The demonstrated superior properties of the GeSe/MoS 2 HJ FETs suggest that they have potential applications in multifunctional electronic devices such as high rectifying diodes and multivalued logic circuits …”

Reconfigurable Logic‐in‐Memory and Multilingual Artificial Synapses Based on 2D Heterostructures

“…Due to the diversity of energy band configurations, 2D van der Waals heterostructure has great potential to form multifunctional devices including memories and logic devices . Recently, a high program/erase ratio of ≈10 9 nonvolatile memory was realized by stacking graphene/h‐BN/MoS 2 /MoTe 2 .…”

Negative Transconductance Heterojunction Organic Transistors and their Application to Full‐Swing Ternary Circuits

“…Recently, heterojunction transistors (H‐TRs) based on various semiconductor materials have been studied for MVL implementation utilizing their negative differential resistance or transconductance characteristics. The materials for H‐TRs include transition metal dichalcogenides (TMDs), organic semiconductors, graphene, and hybrid material combinations, including carbon nanotube (CNT)‐molybdenum disulfide (MoS 2 ), organic‐MoS 2 , and indium gallium zinc oxide (IGZO)‐CNT …”