Le transistor-thyristor métal-oxyde-semiconducteur (T2 MOS)

Tranduc, H.; Rossel, P.; Gharbi, M.; Sanchez, Jean-Louis; Charitat, G.

doi:10.1051/rphysap:01985002008057500

Cited by 2 publications

(1 citation statement)

References 6 publications

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“…Such MOS-thyristor combination was already proposed in our laboratory (LAAS) in 1985 by H. Tranduc to improve the performance of power device structures [4]. More recently a pure LIGBT was proposed to implement an efficient ESD power clamp in an SOI smart power technology [5].…”

Section: Smart Power Soi Technology and Proposed Esd Protectionmentioning

confidence: 99%

Combined MOS–IGBT–SCR Structure for a Compact High-Robustness ESD Power Clamp in Smart Power SOI Technology

Arbess

Bafleur

Trémouilles

et al. 2014

IEEE Trans. Device Mater. Relib.

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Smart power technologies are required to withstand high-electrostatic-discharge (ESD) robustness under both powered and unpowered conditions, particularly for automotive and aeronautic applications among many others. They are concurrently confronted to the challenges of high-temperature operation in order to reduce heat-sink-related costs. In this context, very compact high-robustness ESD protections with low sensitivity to temperature are required. To fulfill this need, we studied a new ESD protection structure that combines in the same component MOS, IGBT, and thyristor effects. This is achieved by inserting in the same LDMOS device P + diffusions in the drain. We studied the impact of N + /P + ratios on R ON and holding current at high temperatures. Structure optimization has been realized with 3-D TCAD simulation and experimentally validated. The proposed structures provide high ESD robustness with small footprint and reduced temperature sensitivity compared with classical solutions. Original design solutions to improve their immunity to latchup are also presented.

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Section: Smart Power Soi Technology and Proposed Esd Protectionmentioning

confidence: 99%