2014 44th European Solid State Device Research Conference (ESSDERC) 2014
DOI: 10.1109/essderc.2014.6948767
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Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM

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Cited by 6 publications
(6 citation statements)
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“…For the RTN amplitude per trap, two popular statistical distributions used in early works are Lognormal [1], [5]- [8], and Exponential [3]- [6], [28], [29]. In addition, Gumbel distribution has been used to capture the long tail of RTN [9]- [11].…”
Section: Results and Discussion A Problems With The Proposed Smentioning
confidence: 99%
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“…For the RTN amplitude per trap, two popular statistical distributions used in early works are Lognormal [1], [5]- [8], and Exponential [3]- [6], [28], [29]. In addition, Gumbel distribution has been used to capture the long tail of RTN [9]- [11].…”
Section: Results and Discussion A Problems With The Proposed Smentioning
confidence: 99%
“…It has received many attentions, as it adversely affects the operation of electronic circuits [1]- [15]. As MOSFETs become smaller, RTN becomes increasingly important, driven by an increased impact of a single charge on smaller devices and an increase in the number of devices in a system [1]- [8]. A large number of devices in a system will contain more devices in the tail of statistical distributions, which can cause errors.…”
Section: Introductionmentioning
confidence: 99%
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“…In an 8-T SRAM, the write operation works in the same way as in a 6-T SRAM, but the read operation works quite differently [7][8][9]. To write data in an 8-T SRAM cell, the write word-line voltage (V WL ) should be increased to V DD so that the corresponding cell can be selected/enabled, and then PG3 and PG4 in the cell become 'on'.…”
Section: Ncfet-based 8-t Sram Bit-cellmentioning
confidence: 99%
“…For a 6-T SRAM read operation, BL and ∼BL are all pre-charged and V WL is increased to V DD . Then, the outputs of inverters A and B approach ∼BL and BL, respectively [8]. However, the read operation of the 8-T SRAM cell is initiated by holding the voltage of both the RBL and RWL at 'high', and the WWL is set to '0'.…”
Section: Ncfet-based 8-t Sram Bit-cellmentioning
confidence: 99%