Jenga

Abstract

Caches are traditionally organized as a rigid hierarchy, with multiple levels of progressively larger and slower memories. Hierarchy allows a simple, fixed design to benefit a wide range of applications, since working sets settle at the smallest (i.e., fastest and most energy-efficient) level they fit in. However, rigid hierarchies also add overheads, because each level adds latency and energy even when it does not fit the working set. These overheads are expensive on emerging systems with heterogeneous memories, where the differences in latency and energy across levels are small. Significant gains are possible by specializing the hierarchy to applications. We propose Jenga, a reconfigurable cache hierarchy that dynamically and transparently specializes itself to applications. Jenga builds virtual cache hierarchies out of heterogeneous, distributed cache banks using simple hardware mechanisms and an OS runtime. In contrast to prior techniques that trade energy and bandwidth for performance (e.g., dynamic bypassing or prefetching), Jenga eliminates accesses to unwanted cache levels. Jenga thus improves both performance and energy efficiency. On a 36-core chip with a 1 GB DRAM cache, Jenga improves energy-delay product over a combination of state-of-the-art techniques by 23% on average and by up to 85%. CCS CONCEPTS • Computer systems organization → Multicore architectures;

FOS: a low-power cache organization for multicores

“…To deal with these issues some approaches [15,17,24] have concentrated on placement/migration approaches in such organization. Recent works like Jigsaw and Jenga [6,39] propose an evolution of this organization by allocating specific banks to each core according to the cache needs of the running applications, hence the number of banks accessed by each core is not necessarily a power of two. The latter works are the most closely related to our proposal; however, these approaches present important differences: i) both Jigsaw and Jenga are hybrid software-hardware implemented; ii) allocated banks need to be located near the core which presents important constraints to the assignment algorithm; and iii) switching off strategies are not devised.…”

Novel Cache Hierarchies with Photonic Interconnects for Chip Multiprocessors

“…For this purpose, in [87] it is presented a hybrid software-hardware approach that defines, by software, collections of cache bank partitions that act as virtual caches, and gives the software control over both data placement and capacity allocation. The proposal is further improved in [88], where they introduce Jenga, a reconfigurable cache hierarchy that adapts itself to applications. In Jenga, not only the cache space is distributed, but the whole cache hierarchy is adapted to the applications behavior, for instance, eliminating accesses to unnecessary cache levels.…”