2009
DOI: 10.1109/ted.2009.2019420
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Interface-Engineered High-Mobility High-$k$/Ge pMOSFETs With 1-nm Equivalent Oxide Thickness

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Cited by 37 publications
(30 citation statements)
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“…It has been previously reported that defects in the dielectric layer and/or D it could be primary sources of frequency dispersion. [25][26][27] However, considering that the D it level in FG-annealed Si devices is approximately one order of magnitude lower than that of O 2 -annealed Ge devices, the imperfection of HfO 2 gate dielectric material such as oxygen vacancies is believed to be a main cause of the annealing ambient dependency of frequency dispersion in the C-V curves in present devices. Thus, O 2 annealing suppresses the formation of oxygen vacancies in the HfO 2 layer due to the oxygen-enriched region during thermal treatment.…”
Section: Methodsmentioning
confidence: 80%
“…It has been previously reported that defects in the dielectric layer and/or D it could be primary sources of frequency dispersion. [25][26][27] However, considering that the D it level in FG-annealed Si devices is approximately one order of magnitude lower than that of O 2 -annealed Ge devices, the imperfection of HfO 2 gate dielectric material such as oxygen vacancies is believed to be a main cause of the annealing ambient dependency of frequency dispersion in the C-V curves in present devices. Thus, O 2 annealing suppresses the formation of oxygen vacancies in the HfO 2 layer due to the oxygen-enriched region during thermal treatment.…”
Section: Methodsmentioning
confidence: 80%
“…Screening of literature was conducted for finding the practical range of variation in interface trap density in Ge MOSFETs with different high-k gate stacks. Our survey dictates that the interface trap charge density in the range 1 Â 10 11 -1 Â 10 13 eV À1 cm À2 would include the D it values for a variety of high-k/Ge interfaces and process conditions [36,37].…”
Section: Resultsmentioning
confidence: 99%
“…It is believed that fluorine segregates to the interface and passivates Ge dangling bonds, more effectively than forming gas annealing. In addition, bulk oxide traps are also passivated [148]. Peak low-field, long-channel effective hole mobilities of 396 cm 2 /Vs have been obtained in this way.…”
Section: Geo 2 Passivation Layermentioning
confidence: 96%
“…This should make the thin GeO 2 interfacial layer more robust against the deposition of the high-k layer. In addition, encouraging results have been achieved by pre-gate GeO 2 surface passivation by thermal oxidation at 400 1C, followed by a post-gate F treatment in a CF 4 plasma [148]. The final step is a Post Deposition Anneal (PDA) at 500 1C for 30 s. A reduction of the D it by a factor of 3 has been found both in the upper and lower half of the band gap, compared with no fluorine treatment [148].…”
Section: Geo 2 Passivation Layermentioning
confidence: 99%
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