We fabricated Ge metal-oxide-semiconductor (MOS) devices with Pt/HfO 2 gate stacks and investigated the effect of thermal treatment on their structural and electrical properties in oxygen (O 2 ) and forming gas (FG) environments. The annealing ambient dependency of the structural and electrical properties of Ge MOS devices was directly compared to that of Si MOS devices. For both Ge and Si MOS devices, the thermal treatment process led to a decrease in accumulation capacitance regardless of the annealing ambient. The interfacial layer (IL) at the HfO 2 /Ge stack was much thinner than the HfO 2 /Si stack. O 2 annealing resulted in the improvement of the HfO 2 interfacial quality of Ge and Si MOS devices, although the improvement of the Ge devices was greater than that of the Si devices. FG annealing was much more effective in the reduction of interface state density (D it ) in Si devices than in Ge devices. A negligible IL at a HfO 2 /Ge stack could be a main cause of degraded electrical performance of a Ge device with FG annealing.
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