Interface Asymmetry Induced by Symmetric Electrodes on Metal–Al:TiO$_{x}$–Metal Structures

Abstract

Emerging memory technologies have sparked great interest in studying a variety of materials that can be employed in metal-insulator-metal topologies to support resistive switching. While the majority of reports focus on identifying appropriate materials that can be used as active core layers, the selection of electrodes also impacts the performance of such memory devices. Here, both the top and the bottom interfaces of symmetric Metal-Al:TiO x -Metal structures have been investigated by the analysis of their current versus voltage characteristics in the temperature range of 300-350 K. Three different metals were utilized as electrodes, Nb, Au, and Pt, for covering a wide range of work function and electronegativity values. Despite their symmetric structure, the devices were found to exhibit asymmetric performance with respect to the applied bias polarity. Clear signature plots indicating thermionic emission over the interface Schottky barriers have been obtained. The asymmetry between the top and the bottom interfaces was further evaluated by the values of the potential barrier heights and by the barrier lowering factors, both calculated from the experimental data. This study highlights the importance of the interface effects and proves that in addition to film doping, proper (top/bottom) metal selection, and interface engineering should also be exploited for developing thin film metal oxide based devices with tailored electrical characteristics.

An Electrical Characterisation Methodology for Benchmarking Memristive Device Technologies

“…3d) allows the extraction of relevant characteristic signature plots. This could take the form of simple Arrhenius plots or more sophisticated versions when the dominant mechanism involves processes such as hopping, Frenkel-Poole emission 14 or Schottky emission over an interface barrier 15,16 (as depicted in Fig. 3e).…”

UV induced resistive switching in hybrid polymer metal oxide memristors

“…The MIM devices are initially electroformed for demonstrating hysteretic characteristics and bipolar behaviour as per, and brought to a resistive level between 25 and 300 kΩ. Electrical characteristics for this class of devices and at similar resistive ranges has been presented elsewhere 21 , 28 , 29 . For this process the device is subjected to consecutive 10–100 μs pulses of negative polarity ranging from − 3 to − 8 V with a 0.25 V voltage step.…”

An electrical characterisation methodology for identifying the switching mechanism in TiO2 memristive stacks

“…and thus a plot of the apparent barrier calculated from the slope versus V 1/2 should obeys a linear relation. If both these signatures are satisfied then the intercept of the last plot corresponds to the potential barrier at the interface under zero applied bias 15,24 (Fig. 3(b,d,f)).…”

“…Therefore, by plotting ln(I/T 2 ) vs 1000/T, while ensuring applied biases maintain a non-switching regime, a linear relation is expected, where the slope corresponds to the apparent effective barrier (Φ B0 − α √V) under each specific electric field 15,24 , as depicted in Fig. 3(a,c,e).…”

“…The Metal-TiO 2 -Metal stacks studied in this work can be equivalently modelled with a series combination of elements for the two interfaces and the active area, allowing us to extract the transport properties in their non-switching regimes. The overall dominant conduction mechanism is primarily determined by the most resistive one 15,24 . For a core-area dependent controlled transport (thus in the absence of interfacial barriers or if these are negligible), I–V curves should be symmetric with respect to the bias polarity.…”