Emerging nanoionic memristive devices are considered as the memory technology of the future and have been winning a great deal of attention due to their ability to perform fast and at the expense of low-power and -space requirements. Their full potential is envisioned that can be fulfilled through their capacity to store multiple memory states per cell, which however has been constrained so far by issues affecting the long-term stability of independent states. Here, we introduce and evaluate a multitude of metal-oxide bi-layers and demonstrate the benefits from increased memory stability via multibit memory operation. We propose a programming methodology that allows for operating metal-oxide memristive devices as multibit memory elements with highly packed yet clearly discernible memory states. These states were found to correlate with the transport properties of the introduced barrier layers. We are demonstrating memory cells with up to 6.5 bits of information storage as well as excellent retention and power consumption performance. This paves the way for neuromorphic and non-volatile memory applications.

Titanium dioxide thin films have attracted increasing attention due to their potential in next-generation memory devices. Of particular interest are applications in resistive random access memory (RRAM) devices, where such thin films are used as active layers in metal–insulator–metal (MIM) configurations. When these devices receive a bias above a certain threshold voltage, they exhibit resistive switching (RS), that is, the resistance of the oxide thin film can be tuned between a high resistive state (HRS) and a low resistive state (LRS). In the context of this work, we have used conductive atomic force microscopy (C-AFM) to identify the resistive switching thresholds of titanium dioxide thin films deposited on Si/SiO2/Ti/Pt stacks to be used in memory devices. By performing a set of reading/writing voltage scans over pristine areas of the thin films, we have identified the critical thresholds, which define a reversible operation (soft-breakdown, SB) via localized changes in electrical resistance across the film and an irreversible operation (hard-breakdown, HB) that includes both changes in local electrical resistance and thin film topography. We have also assessed the transition from SB to HB when thin films are stimulated repeatedly with potentials below the identified onsets of HB, validating a history dependent behavior. This study is therefore aimed at presenting new insights in RRAM device programmability, reliability, and eventually failure mechanisms.

Titanium oxide (TiOx) has attracted a lot of attention as an active material for resistive random access memory (RRAM), due to its versatility and variety of possible crystal phases. Although existing RRAM materials have demonstrated impressive characteristics, like ultra-fast switching and high cycling endurance, this technology still encounters challenges like low yields, large variability of switching characteristics, and ultimately device failure. Electroforming has been often considered responsible for introducing irreversible damage to devices, with high switching voltages contributing to device degradation. In this paper, we have employed Al doping for tuning the resistive switching characteristics of titanium oxide RRAM. The resistive switching threshold voltages of undoped and Al-doped TiOx thin films were first assessed by conductive atomic force microscopy. The thin films were then transferred in RRAM devices and tested with voltage pulse sweeping, demonstrating that the Al-doped devices could on average form at lower potentials compared to the undoped ones and could support both analog and binary switching at potentials as low as 0.9 V. This work demonstrates a potential pathway for implementing low-power RRAM systems.

6Transition metal-oxide resistive random access memory (RRAM) devices have demonstrated excellent performance in switching speed, versatility of switching and low-power operation. However, this technology still faces challenges like poor cycling endurance, degradation due to high electroforming switching voltages and low yields. Engineering of the active layer by doping or addition of thin oxide buffer layers, are approaches that have been often adopted to tackle these problems. Here, we have followed a strategy that combines the two; we have used ultra-thin Al 2 O 3-y buffer layers incorporated between TiO 2-x thin films taking into account both 3+/4+ oxidation states of Al/Ti cations. Our devices were tested by DC and pulsed voltage sweeping and in both cases demonstrated improved switching voltages. We believe that the Al 2 O 3-y layers act as reservoirs of oxygen vacancies which are injected during EF, facilitate a filamentary switching mechanism and provide enhanced filament stability as shown by the cycling endurance measurements.

Tungsten oxide layers have been prepared on conductive glass substrates using aqueous chemical growth from a sodium tungstate precursor at low-temperature hydrothermal conditions. The deposits were then tested as cold electron emitters. Traceable layers could be deposited only within a narrow pH range of 1.5À2 at a time length not exceeding 4 h. Transmittance in the visible spectrum was found to decrease with deposition time. The presence of both monoclinic and hexagonal phases was always detected. At the longest deposition times and highest precursor concentrations, morphologies comprise randomly oriented spikes or rods. The overall emission performance is found to improve with growth time and precursor concentration. The role of morphology on the emission properties of the films is discussed.

Emerging memory technologies have sparked great interest in studying a variety of materials that can be employed in metal-insulator-metal topologies to support resistive switching. While the majority of reports focus on identifying appropriate materials that can be used as active core layers, the selection of electrodes also impacts the performance of such memory devices. Here, both the top and the bottom interfaces of symmetric Metal-Al:TiO x -Metal structures have been investigated by the analysis of their current versus voltage characteristics in the temperature range of 300-350 K. Three different metals were utilized as electrodes, Nb, Au, and Pt, for covering a wide range of work function and electronegativity values. Despite their symmetric structure, the devices were found to exhibit asymmetric performance with respect to the applied bias polarity. Clear signature plots indicating thermionic emission over the interface Schottky barriers have been obtained. The asymmetry between the top and the bottom interfaces was further evaluated by the values of the potential barrier heights and by the barrier lowering factors, both calculated from the experimental data. This study highlights the importance of the interface effects and proves that in addition to film doping, proper (top/bottom) metal selection, and interface engineering should also be exploited for developing thin film metal oxide based devices with tailored electrical characteristics.

Resistive switching (RS) and Resistive Random Access Memories (ReRAMs) that exploit it have attracted huge interests for next generation non volatile memory (NVM) applications, also thought to be able to overcome flash memories limitations when arranged in crossbar arrays. A cornerstone of their potential success is that the RS between two different resistive states, usually High (HRS, High resistive state) and Low(LRS, Low Resistive State) is an intrinsic non-volatile phenomenon with the two states thermodynamically stable. Titanium Dioxide is one of the most common materials known to show non-volatile RS. In this paper we report the first observed volatile resistive switching (VRS) in a Titanium Dioxide thin film. The aim of this paper is to study and understand the VRS phenomenon to give an extensive picture of its underlying Physics. A possible exploitation of the VRS could be in access devices in ReRAM crossbar arrays.

Electrophysiological techniques have improved substantially over the past years to the point that neuroprosthetics applications 1 are becoming viable 2,3 . This evolution has been fuelled by the advancement of implantable microelectrode technologies 4,5 that have followed their own version of Moore's scaling law 4,6 . Similarly to electronics, however, excessive data-rates 7 and strained power budgets require the development of more efficient computation paradigms for handling neural data in-situ; in particular the computationally heavy task of events classification. Here, we demonstrate how the intrinsic analogue programmability of memristive devices 8-10 can be exploited to perform spike-sorting 11 . We then show how combining memristors with standard logic enables efficient in-silico template matching. Leveraging the physical properties of nanoscale 12 memristors allows us to implement ultra-compact analogue circuits for neural signal processing at the power cost of digital.Spike sorting is the procedure of identifying the activity of individual neurons from data collected through electrophysiological experiments 13,14,15,16 . Typically this involves processing raw neuronal data by first detecting the presence of action potential (spiking) activity, then extracting appropriately chosen features and finally, clustering the results; each cluster corresponding to an individual neuron. Memristive devices can inherently act as thresholded integrators 17 . When presented with an input voltage waveform the devices accumulate changes in resistive state linked to the instantaneous signal magnitude and polarity, so long as this exceeds the device threshold. We recently exploited this property for detecting neuronal spiking activity 8 while filtering out background noise.