14th Symposium on Computer Architecture and High Performance Computing, 2002. Proceedings.

DOI: 10.1109/cahpc.2002.1180755

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Interactive ray tracing using a SIMD reconfigurable architecture

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Nozar Tabrizi²,

et al.

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Cited by 5 publications

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“…There are researches on implementing rendering [1,2] and ray tracing [3] with reconfigurable array architectures.…”

Section: Introductionmentioning

confidence: 99%

Implementation of floating-point operations for 3D graphics on a coarse-grained reconfigurable architecture

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²

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et al. 2007

2007 IEEE International SOC Conference

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With the increasing requirements for more flexibility and higher performance in embedded systems design, reconfigurable computing has become more popular. There have been many coarse-grained reconfigurable architectures proposed and/or commercialized. But most of the existing architectures cannot be used for applications that require floating-point operations, since they have only integer units. In this paper, we present how we can perform various floating-point operations on a coarsegrained reconfigurable array of integer processing elements.We demonstrate the effectiveness of our approach through the implementation of various floating-point operations for 3D graphics and their performance analysis.

“…There are researches on implementing rendering [1,2] and ray tracing [3] with reconfigurable array architectures.…”

Section: Introductionmentioning

confidence: 99%

Implementation of floating-point operations for 3D graphics on a coarse-grained reconfigurable architecture

¹

,

²

,

et al. 2007

2007 IEEE International SOC Conference

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With the increasing requirements for more flexibility and higher performance in embedded systems design, reconfigurable computing has become more popular. There have been many coarse-grained reconfigurable architectures proposed and/or commercialized. But most of the existing architectures cannot be used for applications that require floating-point operations, since they have only integer units. In this paper, we present how we can perform various floating-point operations on a coarsegrained reconfigurable array of integer processing elements.We demonstrate the effectiveness of our approach through the implementation of various floating-point operations for 3D graphics and their performance analysis.

Design of a coarse-grained reconfigurable architecture with floating-point support and comparative study

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³

et al. 2014

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No abstract

Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures

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²

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³

et al. 2006

2006 International Conference on Field Programmable Logic and Applications

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No abstract

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