2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)
DOI: 10.1109/vlsit.2002.1015442
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Integration of capacitor for sub-100-nm DRAM trench technology

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Cited by 13 publications
(11 citation statements)
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“…As the 3D structures require a synthesis method that could yield dielectric layers with a high degree of conformity, the atomic-layer-deposition (ALD) technique has been considered to be the most suitable one for this application. In previous works, very high-k values for SrTiO 3 have been measured [4] but the growth process of this material in the proper stoichiometry by ALD is still quite complicated. Fortunately, high k values have been obtained also for rutilephase TiO 2 [5][6][7][8] that can be synthesized by using more robust methods.…”
mentioning
confidence: 99%
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“…As the 3D structures require a synthesis method that could yield dielectric layers with a high degree of conformity, the atomic-layer-deposition (ALD) technique has been considered to be the most suitable one for this application. In previous works, very high-k values for SrTiO 3 have been measured [4] but the growth process of this material in the proper stoichiometry by ALD is still quite complicated. Fortunately, high k values have been obtained also for rutilephase TiO 2 [5][6][7][8] that can be synthesized by using more robust methods.…”
mentioning
confidence: 99%
“…In contrast to the deposition methods for SrTiO 3 , ALD processes of TiO 2 are well developed and no obvious difficulties are expected in adopting these processes in mass production. So it is very possible that TiO 2 -based dielectrics will be used in the nextgeneration DRAM capacitors.…”
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confidence: 99%
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“…Compared to the research publications on advancing the DRAM process technologies, such as trench [1] [2] [3], metalinsulator-metal [4] [5] [6], or embedded DRAM (eDRAM) [7] [8] [9], the publications on the DRAM fault models or test algorithms are relatively limited during the past decade. [10] and [11] shared their industrial experience on constructing DRAM test and testing eDRAM, respectively, but did not discuss the fault models covered by their test methods.…”
Section: Introductionmentioning
confidence: 99%
“…This challenge has resulted in an unprecedented industry-wide effort to establish an advanced scheme for improving the existing process. For the cell capacitor technology, the hemispherical silicon grain (HSG) [1] and [2] and high-k material [3], [4] have been extensively discussed because of their enhanced surface area and dielectric constant. For trench DRAMs, high-k materials such as Al 2 O 3 or HfSiON are important candidates for future storage dielectrics.…”
Section: Introductionmentioning
confidence: 99%