Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications

Demeûs, Laurent; Dessard, Vincent; Viviani, A.; Adriaensen, Stéphane; Flandre, Denis

doi:10.1109/41.915405

Cited by 20 publications

(8 citation statements)

References 16 publications

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“…7, it is found that S R varies from S Rmax = 56 T -1 to S Rmin = 18 T -1 in the B y range from 1 to 30 mT, respectively. Although predicted from simulation, it is still 40 to 50 times higher than the sensitivity found in conventional MAGFETs, (6)(7)(8) indicating the good potential of the new magnetic sensor design. It is also important to emphasize that the sensitivity of the DG SDS MAGFET depends on the particular device geometry and chosen SOI technology parameters.…”

Section: Sensitivity Simulation and Discussionmentioning

confidence: 90%

“…(4,5) Thus, the design of MAGFETs in FD SOI technology has copied the layout of long-gate split-drain MAGFETs originally designed for bulk CMOS technology. (6)(7)(8) It is observed that MAGFETs in FD SOI technology have low magnetic sensitivities similar to their bulk CMOS counterparts falling in the range of (0.05-1.5) T -1 . (6)(7)(8) This limited magnetic sensitivity of conventionally designed bulk or FD SOI MAGFETs is predominantly caused by the low mobility of their carriers transported through the MOS surface channel, which is known to be more than twofold lower than the mobility of bulk carriers.…”

Section: Introductionmentioning

confidence: 99%

“…(6)(7)(8) It is observed that MAGFETs in FD SOI technology have low magnetic sensitivities similar to their bulk CMOS counterparts falling in the range of (0.05-1.5) T -1 . (6)(7)(8) This limited magnetic sensitivity of conventionally designed bulk or FD SOI MAGFETs is predominantly caused by the low mobility of their carriers transported through the MOS surface channel, which is known to be more than twofold lower than the mobility of bulk carriers. (3) A higher sensitivity is always desired since it helps to simplify the system, reduce cost, and decrease power consumption, and may open new applications.…”

Section: Introductionmentioning

confidence: 99%

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Proposal of a Double-Gate Split-Drain/Source MAGFET with Bulk Conduction in FD SOI Technology

2009

Sensors and Materials

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In this paper, the design and operation of a double-gate split-drain/source magnetic fi eld-effect transistor (DG SDS MAGFET) compatible with fully depleted (FD) thinfi lm silicon-on-isolator (SOI) technology are described. Owing to bulk conduction and carrier-domain-based operation of a DG SDS MAGFET, a magnetic sensitivity of 58 T -1 in the mT range of magnetic fi elds is predicted from a three-dimensional sensor numerical simulation. This is almost two orders of magnitude higher than the magnetic sensitivity achieved with conventionally designed MAGFETs in FD SOI technology. In addition, the simulation results revealed that the DG SDS MAGFET can also operate as a bidirectional cross-switch controlled by a pulsed magnetic fi eld with an amplitude above 30 mT.

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Section: Sensitivity Simulation and Discussionmentioning

confidence: 90%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Proposal of a Double-Gate Split-Drain/Source MAGFET with Bulk Conduction in FD SOI Technology

2009

Sensors and Materials

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“…It is evident from the figure that the transconductance efficiency (g m /I d ) decreases with increasing temperature. Meanwhile, the voltage gain and the unity gain bandwidth of the amplifier are directly related to the transconductance efficiency [13]. Therefore, the inversion coefficient is utilized to predict the performance of the amplifier at elevated temperatures.…”

Section: Voltage Regulatormentioning

confidence: 99%

“…SOI also provides improved latch-up immunity which ultimately increases the reliability of the circuit operation at higher temperatures. These features make SOI-based integrated circuits capable of operating successfully in the temperature range of 200-350°C [13] which is well above the range of conventional bulk silicon-based devices. In our work, a process that combines the advantages of high-voltage devices with SOI technology is chosen for the design and implementation of the high-temperature circuits.…”

Section: Introductionmentioning

confidence: 96%

A high-temperature, high-voltage, fast response linear voltage regulator

Islam

Zhu

et al. 2012

Analog Integr Circ Sig Process

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This paper reports a high-temperature integrated linear voltage regulator implemented in a 0.8-lm BCD (bipolar, CMOS and DMOS)-on-silicon-on-insulator process. This step-down voltage regulator converts an unregulated high input DC voltage to a regulated nominal CMOS voltage (i.e. 5 V) for the low-side buffer (pre-driver) and other digital and analog building blocks of a high-temperature integrated gate driver circuit. An error amplifier inside the regulator has been designed using inversion coefficient methodology, and a temperature stable current reference has been used to bias the error amplifier. The linear regulator provides an output voltage of 5.3 V at room temperature and can supply a maximum load current of 200 mA. The linear voltage regulator integrated circuit has been tested at ambient temperatures from 25 to 200°C with the input voltage varying from 10 to 30 V. A compensation method (pole swap) that extends the range of the system stability has been implemented and analyzed in detail. The simulated unity gain bandwidth can reach approximately 4 MHz when the load current is 200 mA and the measured transient response time is less than 150 nS when the load current is 50 mA and the ambient temperature is 200°C.

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Soi Technology

Flandre¹

2004

Smart Adaptive Systems on Silicon

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Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications

Cited by 20 publications

References 16 publications

Proposal of a Double-Gate Split-Drain/Source MAGFET with Bulk Conduction in FD SOI Technology

Proposal of a Double-Gate Split-Drain/Source MAGFET with Bulk Conduction in FD SOI Technology

A high-temperature, high-voltage, fast response linear voltage regulator

Soi Technology

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