2003 Design, Automation and Test in Europe Conference and Exhibition
DOI: 10.1109/date.2003.1253733
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Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip

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Cited by 69 publications
(48 citation statements)
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“…The idea of improving an RTOS has already appeared to be able to manage both HW and SW tasks. First proofs of concepts have been exhibited in [6] and [5]. In [5], the RTOS is dedicated to the management of HW tasks.…”
Section: Related Workmentioning
confidence: 99%
“…The idea of improving an RTOS has already appeared to be able to manage both HW and SW tasks. First proofs of concepts have been exhibited in [6] and [5]. In [5], the RTOS is dedicated to the management of HW tasks.…”
Section: Related Workmentioning
confidence: 99%
“…However, the system does not employ bitstream relocation because of the irregular location of combined BlockRAM (BRAM) and multiplier columns in the reconfigurable regions. Other work considers a reconfigurable system-onchip for a portable media platform that can move tasks from software into reconfigurable hardware [9]. This system cannot relocate tasks on the FPGA and requires a bitstream for every possible task location.…”
Section: Introductionmentioning
confidence: 99%
“…In order to overcome the architectural differences between heterogeneous PEs, tasks can only migrate at pre-defined execution points in the code (further denoted as migration points) [10]. How to handle task state when migrating between a regular PE and a RH tile is detailed in [14]. Another major issue in run-time task migration is assuring communication consistency during the migration process.…”
Section: Run-time Task Migrationmentioning
confidence: 99%