Influences of high-temperature annealing on atomic layer deposited Al₂O₃/4H-SiC

Abstract

Wang Yi-Yu(王弋宇) a) , Shen Hua-Jun(申华军) a) † , Bai Yun(白 云) a) , Tang Yi-Dan(汤益丹) a) , Liu Ke-An(刘可安) b) , Li Cheng-Zhan(李诚瞻) b) , and Liu Xin-Yu(刘新宇) a) a)

Nanometer-thin ALD-Al2O3for the improvement of the structural quality of AlN grown on sapphire substrate by MOVPE

“…It is considered that the crystalline transformation occurred during temperature ramp‐up prior to AlN growth by MOVPE. It has been reported that amorphous Al 2 O 3 starts to crystallize at 900 °C . This indicates that ALD‐Al 2 O 3 was partially crystallized prior to BL AlN growth either at 1025 or 1050 °C.…”

Influences of low-temperature postdeposition annealing on memory properties of Al/Al2O3/Al-rich Al-O/SiO2/p-Si charge trapping flash memory structures

“…To investigate it, we calculated the change of C H and C L values by measuring released charge at nonbias state after applying the program or erase pulse voltage shown in Fig. [26][27][28][29] However, the present structure includes the Al-rich Al-O charge trapping layer with intentionally generated defects. First, the erasing pulse of À7 V was applied for 1 s, and the specimen entered an erased state.…”

Structural and Insulating Behaviour of High-Permittivity Binary Oxide Thin Films for Silicon Carbide and Gallium Nitride Electronic Devices

“…Generally, a large number of high-κ oxides possess crystallization temperatures of about 400-500 • C, with Al 2 O 3 being the most thermally stable at up to 800 • C. However, independently of the chemical nature of the high-κ oxide, the annealing process can improve dielectrical properties. For instance, Wang et al [50] demonstrated the beneficial effects of high-temperature annealings (800-1000 • C) performed in O 2 atmosphere on Al 2 O 3 films. In particular, they showed that although Al 2 O 3 films started crystallizing at 900 • C, capacitance vs. voltage (C-V) measurements revealed their improved electrical characteristics (i.e., reduced hysteresis phenomena).…”

“…Hence, the authors concluded that annealing at 900 • C represented the best option in terms of both surface morphology and dielectric quality. On the other hand, many other papers demonstrated that such high annealing temperatures induce the formation of a thin stoichiometric or sub-stoichiometric silicon oxide interfacial layer [33,[50][51][52]. This oxidation phenomenon can have a detrimental impact on the properties of high-κ/SiC interfaces, including in the case of abrupt Al 2 O 3 /4H-SiC interfaces obtained by ALD growth [40,[53][54][55].…”