Proceedings of the 54th Annual Design Automation Conference 2017 2017
DOI: 10.1145/3061639.3062266
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Incorporating the Role of Stress on Electromigration in Power Grids with Via Arrays

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Cited by 7 publications
(6 citation statements)
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“…Some of them are based on numerical simulations while the others are based on analytical solutions. At an early time, Vivek Mishra et al modeled the impact of EM in Cu interconnects on power grid integrity with using probability analysis [36,[38][39][40]43]. Figure 6 shows the CDF plots for IR drop of a studied power grid for different circuit lifetime [40].…”
Section: Modeling and Simulation Methodologiesmentioning
confidence: 99%
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“…Some of them are based on numerical simulations while the others are based on analytical solutions. At an early time, Vivek Mishra et al modeled the impact of EM in Cu interconnects on power grid integrity with using probability analysis [36,[38][39][40]43]. Figure 6 shows the CDF plots for IR drop of a studied power grid for different circuit lifetime [40].…”
Section: Modeling and Simulation Methodologiesmentioning
confidence: 99%
“…Third, weakest-link statistics considers a single branch failure leads to failure of studied interconnect trees which is not true in state-of-the-art ICs, especially for power grids with a mesh structure [35]. Therefore, some physics-based EM compact models have been proposed to incorporate the atom movement between segments [36][37][38][39][40][41][42][43][44]. It is noted that there are already several excellent reviews on relevant topics in [34,[45][46][47][48], but they are mainly on power grids.…”
Section: Introductionmentioning
confidence: 99%
“…Since copper dual damascene interconnection is known to have early-stage void nucleation [6], the TTF of the slit voids of via was assumed to be modeled by void growth time. In the void growth phase, the void grows in the fixed direction and the wire resistance starts to increase over time to a steady-state value.…”
Section: A Em Analysismentioning
confidence: 99%
“…When the void covers the entire via, via is regarded as an open circuit and needs to be removed. Hence, each node's voltage drop and temperature distribution must be updated to calculate TTF for a voltage drop violation of the power grid to occur [6].…”
Section: B Power Grid and Modelingmentioning
confidence: 99%
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