Recent Progress in Physics-Based Modeling of Electromigration in Integrated Circuit Interconnects

Zhao, Wen‐Sheng; Zhang, Rui; Wang, Dawei

doi:10.3390/mi13060883

Cited by 6 publications

(3 citation statements)

References 124 publications

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“…An overview of physics-based modelling approaches for electro migration and their applications for integrated circuit interconnects has been published by Wen-Sheng Zhao et al 5 The impact of electromigration on power grids and signal interconnects is examined in this research. The conventional method and physics-based modeling for electromigration are described.…”

Section: Electro Migration In Integrated Circuit Interconnectsmentioning

confidence: 99%

A Comparative Study and Analysis of Various Interconnects for Very Large-Scale Integration

Susaritha

2023

ECS Adv.

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We examined various interconnects utilised in very large-scale integration (VLSI). The expanding use of portable devices has increased the demand for low-power circuit design. Sub-threshold circuits are the greatest option to address the demand for even more-low power. However, decreased performance and increased variability are the main problems with sub-threshold circuits. Furthermore, global interconnects have a significant impact on the performance and power dissipation of sub-threshold circuits. For future VLSI circuit applications, interconnect is a brand-new and very promising alternative for which the propagation latency and stability must be analysed in order to substantiate its claim that it can replace existing interconnect designs.

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Section: Electro Migration In Integrated Circuit Interconnectsmentioning

confidence: 99%

A Comparative Study and Analysis of Various Interconnects for Very Large-Scale Integration

Susaritha

2023

ECS Adv.

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“…In a Cu damascene structure, the TaN/Ta barrier and the DB act as a boundary for the Cu, and this is where the depletion of metal atoms begins. As a result, Cu EM shifts into the voids through the nucleation, incubation, and growth phases [96]. The dimensions of the vias and metal determine the likelihood that the voids produced in this manner will affect the resistance.…”

Section: Electromigrationmentioning

confidence: 99%

Recent Trends in Copper Metallization

Kim

2022

Electronics

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The Cu/low-k damascene process was introduced to alleviate the increase in the RC delay of Al/SiO2 interconnects, but now that the technology generation has reached 1× nm or lower, a number of limitations have become apparent. Due to the integration limit of low-k materials, the increase in the RC delay due to scaling can only be suppressed through metallization. As a result, various metallization methods have been proposed, including traditional barrier/liner thickness scaling, and new materials and integration schemes have been developed. This paper introduces these methods and summarizes the recent trends in metallization. It also includes a brief introduction to the Cu damascene process, an explanation of why the low-k approach faces limitations, and a discussion of the measures of reliability (electromigration and time-dependent dielectric breakdown) that are essential for all validation schemes.

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“…Du et al develop a mathematical degradation model for evaluating the degradation of vacuum packaged MEMS sensors and perform a temperature-accelerated test of MEMS gyroscopes with different vacuums [ 10 ]. Zhao et al introduce recent studies on the physics-based modeling of the electromigration aging of interconnects [ 11 ].…”

mentioning

confidence: 99%