14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2011
DOI: 10.1109/ddecs.2011.5783099
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Improving performance of robust Self Adaptive Caches by optimizing the switching algorithm

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Cited by 3 publications
(1 citation statement)
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“…In the future we propose to merge this method to the one described in [10] in order to furthermore improve the performance and decrease the overhead both in energy consume and area overhead. Also for the increase of performance we will analyze the advantages and disadvantages of adding a non-concurrent BIST which from time to time will test the memory to see if there are any locations that can be taken out of the L-Zone and given back to normal use.…”
Section: Conclussions and Future Workmentioning
confidence: 97%
“…In the future we propose to merge this method to the one described in [10] in order to furthermore improve the performance and decrease the overhead both in energy consume and area overhead. Also for the increase of performance we will analyze the advantages and disadvantages of adding a non-concurrent BIST which from time to time will test the memory to see if there are any locations that can be taken out of the L-Zone and given back to normal use.…”
Section: Conclussions and Future Workmentioning
confidence: 97%