Improvement of the Charge Retention of a Non-Volatile Memory by a Bandgap-Engineered Charge Trap Layer

Cui, Zhaolei; Xin, Dongxu; Kim, Tae-Yong; Choi, Ji‐Won; Cho, Jaewoong; Yi, Junsin

doi:10.1149/2162-8777/ac3f1d

Cited by 3 publications

(2 citation statements)

References 31 publications

(30 reference statements)

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“…Doping/mixing with other elements was a very efficient way to modify the density and spatial and energy location of electrically active defects. Bandgap engineering of the CTL by introducing Al in HfO 2 or stacking HfO 2 with Al 2 O 3 has been suggested [21][22][23][24], resulting in an enhancement in memory performance and reliability.…”

Section: Charge Trapping Layermentioning

confidence: 99%

Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

Spassov,

Paskaleva

2023

Nanomaterials

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The requirements for ever-increasing volumes of data storage have urged intensive studies to find feasible means to satisfy them. In the long run, new device concepts and technologies that overcome the limitations of traditional CMOS-based memory cells will be needed and adopted. In the meantime, there are still innovations within the current CMOS technology, which could be implemented to improve the data storage ability of memory cells—e.g., replacement of the current dominant floating gate non-volatile memory (NVM) by a charge trapping memory. The latter offers better operation characteristics, e.g., improved retention and endurance, lower power consumption, higher program/erase (P/E) speed and allows vertical stacking. This work provides an overview of our systematic studies of charge-trapping memory cells with a HfO2/Al2O3-based charge-trapping layer prepared by atomic layer deposition (ALD). The possibility to tailor density, energy, and spatial distributions of charge storage traps by the introduction of Al in HfO2 is demonstrated. The impact of the charge trapping layer composition, annealing process, material and thickness of tunneling oxide on the memory windows, and retention and endurance characteristics of the structures are considered. Challenges to optimizing the composition and technology of charge-trapping memory cells toward meeting the requirements for high density of trapped charge and reliable storage with a negligible loss of charges in the CTF memory cell are discussed. We also outline the perspectives and opportunities for further research and innovations enabled by charge-trapping HfO2/Al2O3-based stacks.

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Section: Charge Trapping Layermentioning

confidence: 99%

Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

Spassov,

Paskaleva

2023

Nanomaterials

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“…HfO 2 as the most studied high-k dielectric has been considered also for application in CT-NVMs because it is a trap-rich material, and the study of You et al [11] revealed that the 2 nm HfO 2 layer has a better charge trapping efficiency than 7 nm Si 3 N 4 . Charge trapping properties of HfO 2 could be substantially enhanced by doping with Al atoms or stacking with Al 2 O 3 [12][13][14][15][16]. The storage characteristics could be further boosted by proper treatments, e.g., annealing steps and UV irradiation [14,17,18].…”

Section: Introductionmentioning

confidence: 99%

Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

et al. 2022

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Flash memories are the preferred choice for data storage in portable gadgets. The charge trapping nonvolatile flash memories are the main contender to replace standard floating gate technology. In this work, we investigate metal/blocking oxide/high-k charge trapping layer/tunnel oxide/Si (MOHOS) structures from the viewpoint of their application as memory cells in charge trapping flash memories. Two different stacks, HfO2/Al2O3 nanolaminates and Al-doped HfO2, are used as the charge trapping layer, and SiO2 (of different thickness) or Al2O3 is used as the tunneling oxide. The charge trapping and memory windows, and retention and endurance characteristics are studied to assess the charge storage ability of memory cells. The influence of post-deposition oxygen annealing on the memory characteristics is also studied. The results reveal that these characteristics are most strongly affected by post-deposition oxygen annealing and the type and thickness of tunneling oxide. The stacks before annealing and the 3.5 nm SiO2 tunneling oxide have favorable charge trapping and retention properties, but their endurance is compromised because of the high electric field vulnerability. Rapid thermal annealing (RTA) in O2 significantly increases the electron trapping (hence, the memory window) in the stacks; however, it deteriorates their retention properties, most likely due to the interfacial reaction between the tunneling oxide and the charge trapping layer. The O2 annealing also enhances the high electric field susceptibility of the stacks, which results in better endurance. The results strongly imply that the origin of electron and hole traps is different—the hole traps are most likely related to HfO2, while electron traps are related to Al2O3. These findings could serve as a useful guide for further optimization of MOHOS structures as memory cells in NVM.

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2D Reconfigurable Memory Device Enabled by Defect Engineering for Multifunctional Neuromorphic Computing

Xia,

Lin,

Zha

et al. 2024

Advanced Materials

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In this era of artificial intelligence and Internet of Things, emerging new computing paradigms such as in‐sensor and in‐memory computing call for both structurally simple and multifunctional memory devices. Although emerging two‐dimensional (2D) memory devices provide promising solutions, the most reported devices either suffer from single functionalities or structural complexity. Here, this work reports a reconfigurable memory device (RMD) based on MoS2/CuInP2S6 heterostructure, which integrates the defect engineering‐enabled interlayer defects and the ferroelectric polarization in CuInP2S6, to realize a simplified structure device for all‐in‐one sensing, memory and computing. The plasma treatment‐induced defect engineering of the CuInP2S6 nanosheet effectively increases the interlayer defect density, which significantly enhances the charge‐trapping ability in synergy with ferroelectric properties. The reported device not only can serve as a non‐volatile electronic memory device, but also can be reconfigured into optoelectronic memory mode or synaptic mode after controlling the ferroelectric polarization states in CuInP2S6. When operated in optoelectronic memory mode, the all‐in‐one RMD could diagnose ophthalmic disease by segmenting vasculature within biological retinas. On the other hand, operating as an optoelectronic synapse, this work showcases in‐sensor reservoir computing for gesture recognition with high energy efficiency.

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Improvement of the Charge Retention of a Non-Volatile Memory by a Bandgap-Engineered Charge Trap Layer

Cited by 3 publications

References 31 publications

Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

2D Reconfigurable Memory Device Enabled by Defect Engineering for Multifunctional Neuromorphic Computing

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