Improvement of substrate and package warpage by copper plating process optimization

Abstract

High substrate warpage can lead to unacceptable yield loss during chip attach in assembly, and cause high yield fallout during package mount on the circuit board. For the first time, through this work, the electrolytic copper (Cu) plating process in substrate manufacturing was shown to contribute significantly to package warpage. For a 14x14mm package, reducing the Cu plating rate (within the manufacturing operating window) resulted in 21% package warpage reduction, while a change in Cu plating solution provided an additional 6% reduction (total 27% reduction). Hence the Cu plating process and solution must be carefully scrutinized to minimize package warpage, specifically for thin packages (<1mm) where Cu stresses become a large contributing factor.

Low Stress and High Ductility Copper Electroplating Additive Development

“…All these properties indicated the better ductility of deposit from formulation 2. Dramatic evolution in the microstructure of electroplated copper films have been reported (3,11), especially for copper deposits with high internal stress. To better understand the mechanism of stress character and change of stress over time, microstructure evolution of copper deposit from formulations 1 and 2 were monitored by FIB-SEM.…”

“…Electroplated copper is being widely used in many areas including silicon solar cells, circuit board industries, interconnect and advanced packaging applications because of the low cost, easy manufacturing process, and high throughput (1)(2)(3)(4)(5). As industry moves to thinner substrates, warpage and adhesion of the copper deposit to the substrate become increasing areas of concern.…”

“…As industry moves to thinner substrates, warpage and adhesion of the copper deposit to the substrate become increasing areas of concern. High substrate warpage and poor adhesion can lead to unacceptable yield loss from post metallization processes (3).…”

P‐60: Single‐Step Plasma‐Enhanced Chemical Vapor Deposition of Graphene on Cu Ink and Sputtered Cu Thin Films

“…On the other hand, current Cu interconnects involve electroplating of a thick Cu layer on top of a sputtered Cu seed layer (3) in order to increase the conductivity. However, the thick Cu layer would lead to less flexibility for flexible electronic applications (4). Therefore, it would be preferable to eliminate the need of electroplating a thick Cu layer.…”