Improvement of Drive Current in Bulk-FinFET using Full 3D Process/Device Simulations

Kondo, Takahisa; Izumida, T.; Aoki, Naofumi; Kondo, Masaki; Ito, S.; Enda, T.; Okano, K.; Kawasaki, H.; Yagishita, Akira; Kaneko, A.; Inaba, S.; Nakamura, Mitsutoshi; Ishimaru, K.; Suguro, K.; Eguchi, Kazuhiro; Ishiuchi, H.

doi:10.1109/sispad.2006.282855

Cited by 11 publications

(5 citation statements)

References 3 publications

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“…[4][5][6][7] In particular, plasma nitridation is a useful technique because it is a low-temperature process with high controllability of N distribution. In addition, CVD processes is required for three-dimentional (3D) devices, such as 3D NAND, [8][9][10] FinFETs, [11][12][13] and gate-all-around transistors, [14][15][16] to produce conformal films. The behavior of N 2 molecules in plasma-nitrided thermally grown SiO 2 films has been studied by several researchers.…”

Section: Introductionmentioning

confidence: 99%

Behavior of incorporated nitrogen in plasma-nitrided silicon oxide formed by chemical vapor deposition

Shinoda

Itokawa

Fujitsuka

et al. 2016

Jpn. J. Appl. Phys.

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The behavior of nitrogen (N) atoms in plasma-nitrided silicon oxide (SiO2) formed by chemical vapor deposition (CVD) was characterized by physical analysis and from electrical properties. The changes in the chemical bonding and distribution of N in plasma-nitrided SiO2 were investigated for different subsequent processes. N–Si3, N–Si2O, and N2 are formed in a SiO2 film by plasma nitridation. N2 molecules diffuse out during annealing at temperatures higher than 900 °C. NH species are generated from N2 molecules and H in the SiO2 film with subsequent oxide deposition using O3 as an oxidant. The capacitance–voltage (C–V) curves of metal–oxide–semiconductor (MOS) capacitors are obtained. The negative shift of the C–V curve is caused by the increase in the density of positive fix charge traps in CVD-SiO2 induced by plasma nitridation. The C–V curve of plasma-nitrided SiO2 subjected to annealing shifts to the positive direction and that subjected to the subsequent oxide deposition shifts markedly to the negative direction. It is clarified that the density of positive charge fixed traps in plasma-nitrided SiO2 films decrease because the amount of N2 molecules is decreased by annealing, and that the density of traps increases because NH species are generated and move to the interface between SiO2 and the Si substrate with the subsequent oxide deposition.

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Section: Introductionmentioning

confidence: 99%

Behavior of incorporated nitrogen in plasma-nitrided silicon oxide formed by chemical vapor deposition

Shinoda

Itokawa

Fujitsuka

et al. 2016

Jpn. J. Appl. Phys.

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“…So, it is important to optimize bulk FinFET performance as in SOI FinFET. The earlier bulk FinFET structures [11,12,13] use a heavily doped upper Fin/channel doping and a heavier lower fin doping to control the short-channel effects (SCEs) but this results in a channel mobility degradation causing a lower ION/IOFF ratio. Therefore different Bulk structures are studied can compared for non uniform doping profiles.…”

Section: Introductionmentioning

confidence: 99%

Optimization of Pie-gate Bulk FinFET Structure

Tripathi¹,

Vadthiya²,

Mishra³

2012

IJCA

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In this paper we propose a novel Pie gate bulk FinFET structure for logic applications suitable for system-on-chip (SOC) requirements. The influence of gate at bottom to junction depth, misalignment was examined for deeper junctions and shallower junctions. It has shown that bulk FinFET with source/drain to body (S/D) junctions shallower than gate at bottom has equal or better subthreshold performance than SOI FinFET. Further, we extend the concept of heavy body doping in bulk FinFETs of Pie-gate structure. The characteristics of such bulk FinFET structure is analyzed by 3D device simulation and compared with SOI FinFET. General termsBulk Fin-shaped field-effect transistor (FinFET), shortchannel performance, SS, DIBL, sentaurus TCAD device simulator.

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“…We have also demonstrated the substantial improvement of device characteristics of bulk-FinFETs utilizing proposed impurity profiles, such as the threshold voltage roll-off, the drain induced barrier lowering (DIBL) effect, and junction capacitance. [1][2][3][4] On the other hand, there is an inherent problem in the formation of source/drain extension (SDE) of a bulk-FinFET. Unlike in the case of a conventional planar FET, the channel surface of FinFET is formed on the sidewalls of Si fin.…”

Section: Introductionmentioning

confidence: 99%

Advantage of Plasma Doping for Source/Drain Extension in Bulk Fin Field Effect Transistor

Izumida¹,

Okano²,

Kondo³

et al. 2011

Jpn. J. Appl. Phys.

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The impact of plasma doping (PD) on the formation of source/drain extension (SDE) is demonstrated for a p-type bulk fin field effect transistor (FinFET). The impurity distribution in a narrow fin (15 nm) was analyzed with atom probe tomography (APT) and secondary ion mass spectroscopy (SIMS). The lateral distribution of boron in the Si fin by the PD is similar to the case with conventional beam-line ion implantation (BL). However, the vertical distribution of boron by the PD is much steeper than that by the conventional BL. TCAD simulations show that the driving current of the FinFET fabricated by the PD is 34% higher than that of the FinFET fabricated by the BL under the same off-leakage current. Therefore, the PD is a key technology for fabricating the SDE of narrow bulk-FinFETs in the future.

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Improvement of Drive Current in Bulk-FinFET using Full 3D Process/Device Simulations

Cited by 11 publications

References 3 publications

Behavior of incorporated nitrogen in plasma-nitrided silicon oxide formed by chemical vapor deposition

Behavior of incorporated nitrogen in plasma-nitrided silicon oxide formed by chemical vapor deposition

Optimization of Pie-gate Bulk FinFET Structure

Advantage of Plasma Doping for Source/Drain Extension in Bulk Fin Field Effect Transistor

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