Improved Sub-micron Cmos Device Performance Due To Fluorine In Cvd Tungsten Silicide

Jain, Vivek; Pramanik, Dipankar; Chang, Kai‐Chun; Hu, Chenming

doi:10.1109/vlsit.1991.706005

Cited by 7 publications

(8 citation statements)

References 5 publications

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“…Similarly, the large value implies that the sputtered WSi devices have larger S/D lateral extent for both n-or p-channel devices. These experimental results seem to be opposite to prior result of the enhanced S/D lateral diffusion of the CVD tungsten polycide MOSFET [1], [2]. It is probably due to the devices in our work were subjected to RTA process and have thinner poly-Si (1500Å), gate oxide (115Å) and shallower junction depth.…”

Section: Resultscontrasting

confidence: 89%

“…The plot shows that the sputtered WSi devices possess worse off state behavior. It is apparent that a difference exist in of two different WSi processes and this difference is independent of the higher than 0.4 m. The results seem to be different from previous result [1]. It is contributed to more generation-recombination centers at/near the Si/SiO interface of the sputtered WSi device.…”

Section: Resultsmentioning

confidence: 56%

“…After 900 C, 45 min. WSi annealing, fluorine is found to diffuse into the Si/SiO interface and channel region through the poly-Si and gate oxide [1], [9]. The fluorine, which diffuses into substrate (LDD and S/D region), is increased as the poly-Si layer and gate oxide is scaled down.…”

Section: Resultsmentioning

confidence: 99%

“…Sputtered or CVD WSi polycide wafers were processed through the same sequence (thermal history) except the WSi film deposition. The as grown gate oxide thickness of sputtered WSi polycide wafer is slightly thicker ( 15Å) than that of CVD WSi polycide wafers such that the final oxide thickness (115 obtained via capacitance-voltagemeasurement) of both were similar [1], [6], [7].…”

Section: Methodsmentioning

confidence: 98%

“…Jain et al have compared the CMOS performance with different WSi process. They reported that CVD WSi had a lower for a given polycide line-width as compared to the sputtered WSi [1]. Chen et al also reported that CVD WSi process might enhance S/D lateral diffusion for both n-and p-channel devices [2].…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Effects of different tungsten polycide process on the effective channel length and performance of deep submicron CMOS transistors

Huang

Fang

Yaung

et al. 1999

IEEE Electron Device Lett.

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The effects of the different tungsten polycide technologies on the effective channel length and electrical performance of the scaled CMOS transistors with rapid thermal anneal (RTA) have been investigated. Contrary to previous studies[1], [2], it is found that the sputtered WSi X X X device has larger reduction in channel length. Which is confirmed by gate-todrain overlap capacitance C GD C GD C GD measurement. Experiments also indicate that the sputtered WSiX X X devices possess a lower driving ability. Furthermore, the sputtered WSiX X X devices have higher off state leakage not only for the short channel but also for the long channel range, which is different from the previous result [1].

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Section: Resultscontrasting

confidence: 89%

Section: Resultsmentioning

confidence: 56%

Section: Resultsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Effects of different tungsten polycide process on the effective channel length and performance of deep submicron CMOS transistors

Huang

Fang

Yaung

et al. 1999

IEEE Electron Device Lett.

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Hot-carrier induced degradation of polysilicon and tungsten polycide gate MOSFETs under maximum substrate and gate current stresses

Lou

Chim

Chan

et al. 1996

Semicond. Sci. Technol.

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Under maximum substrate current (I sub,max ) stress (i.e. V g ≈ V d /2), the hot-carrier induced degradation of tungsten polycide gate (WSi x ) n-MOSFETs in the linear drain current and maximum linear transconductance is lower, and the shift in the threshold voltage is higher than that of polysilicon gate (PolySi) n-MOSFETs. However, under maximum gate current (I g,max ) stress (i.e. V g = V d ), the WSi x n-MOSFETs showed higher hot-carrier induced degradation than the PolySi devices. In contrast, WSi x p-MOSFETs showed higher degradation compared with the PolySi p-MOSFETs under both I g,max (i.e. V g < V d /2) and I sub,max (i.e. V g ≈ V d /2) stresses. An explanation, substantiated by charge-pumping measurements, is proposed to explain the phenomena observed. The hot-carrier lifetime of WSi x p-MOSFETs is found to limit the operation of WSi x CMOS circuits.

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The effect of fluorine on MOSFET channel length

Lin

Rost

Lee

et al. 1993

IEEE Electron Device Lett.

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Improved Sub-micron Cmos Device Performance Due To Fluorine In Cvd Tungsten Silicide

Cited by 7 publications

References 5 publications

Effects of different tungsten polycide process on the effective channel length and performance of deep submicron CMOS transistors

Effects of different tungsten polycide process on the effective channel length and performance of deep submicron CMOS transistors

Hot-carrier induced degradation of polysilicon and tungsten polycide gate MOSFETs under maximum substrate and gate current stresses

The effect of fluorine on MOSFET channel length

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