Improved 4H-SiC UMOSFET with super-junction shield region*

Abstract

This article investigates an improved 4H-SiC trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) (UMOSFET) fitted with a super-junction (SJ) shielded region. The modified structure is composed of two n-type conductive pillars, three p-type conductive pillars, an oxide trench under the gate, and a light n-type current spreading layer (NCSL) under the p-body. The n-type conductive pillars and the light n-type current spreading layer provide two paths to and promote the diffusion of a transverse current in the epitaxial layer, thus improving the specific on-resistance (R on,sp). There are three p-type pillars in the modified structure, with the p-type pillars on both sides playing the same role. The p-type conductive pillars relieve the electric field (E-field) in the corner of the trench bottom. Two-dimensional simulation (silvaco TCAD) indicates that R on,sp of the modified structure, and breakdown voltage (V BR) are improved by 22.2% and 21.1% respectively, while the maximum figure of merit ( FOM = V BR 2 / R on , sp ) is improved by 79.0%. Furthermore, the improved structure achieves a light smaller low gate-to-drain charge (Q gd) and when compared with the conventional UMOSFET (conventional-UMOS), it displays great advantages for reducing the switching energy loss. These advantages are due to the fact that the p-type conductive pillars and n-type conductive pillars configured under the gate provide a substantial charge balance, which also enables the charge carriers to be extracted quickly. In the end, under the condition of the same total charge quantity, the simulation comparison of gate charge and OFF-state characteristics between Gauss-doped structure and uniform-doped structure shows that Gauss-doped structure increases the V BR of the device without degradation of dynamic performance.

A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance

“…The incomplete ionization model (INCOMPLETE) is used in the simulation. [31][32][33] 3.1. On-state characteristic…”

A 3D SiC MOSFET with poly-silicon/SiC heterojunction diode

“…With the increase of the thickness of CSL, the R on changes in an opposite way. An L P of 0.4 µm and an L P−poly of 1.0 µm are chosen to analyze the device's performance for HJD-TMOS, and the R on is about 1.89 mΩ•cm 2 . In order to reach the same R on level as the HJD-TMOS, the thickness of CSL in C-TMOS is set to be 0.36 µm, and an R on of 1.88 mΩ•cm 2 is obtained just as shown in Fig.…”

“…Owing to its representative wide band-gap material and device performance, SiC metal-oxide-semiconductor fieldeffect transistor (MOSFET) is widely used in the power systems on account of the properties of low on-state resistance, high power density, outstanding switching characteristics, etc. [1][2][3] To obtain a high efficiency and a low power loss, it is important to increase the reliability of the SiC MOS-FET and reduce the chip size. When the conventional SiC trench MOSFET (C-TMOS) is used in the power systems, a Schottky barrier diode (SBD) must be paralleled to prevent the aged deterioration, [4][5][6][7] which may result in high cost, extra power loss, and undesirable stray inductances.…”

A SiC asymmetric cell trench MOSFET with a split gate and integrated p+-poly Si/SiC heterojunction freewheeling diode

“…Silicon carbide (SiC) power metal-oxide-semiconductor field effect transistor (MOSFET) has the advantages of high breakdown voltage (BV) because of its PN junction, low specific on-resistance (R on,sp ), large thermal conductivity, fast transformational speed, anti-irradiation, and so on. [1][2][3][4][5][6][7][8][9][10] The SiC MOSFET can meet the strict requirements of advanced power electronics applications. It is considered to be one of the most capable power devices, which has been rapidly applied and developed in high-temperature and high-pressure solar power regulators, motor driven cars, rail transport vehicles and aerial vehicles.…”