A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance

Abstract

In this article, an optimized silicon carbide (SiC) trench Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) structure with side-wall p-type pillar (p-pillar) and wrap n-type pillar (n-pillar) in the n-drain was investigated utilizing Silvaco TCAD simulations. The optimized structure main includes a p+ buried region, a light n-type current spreading layer (CSL), a p-type pillar region, and a wrapping n-type pillar region at the right and bottom of the p-pillar. The improved structure is named SNPPT-MOS. The side-wall p-pillar region could better relieve the high electric field around the p+ shielding region and the gate oxide in the off-state mode. The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance (R on,sp). As a result, the SNPPT-MOS structure exhibits that a higher figure of merit (FoM) related to the breakdown voltage (V BR) and the R on,sp (V BR 2/R on,sp) of the SNPPT-MOS is improved by 44.5%, respectively, with comparison to that of the conventional trench gate SJ MOSFET (full-SJ-MOS). In addition, the SNPPT-MOS structure achieves a much faster-switching speed than the full-SJ-MOS, and the result indicated an appreciable reduction in the switching energy loss.

Advances and challenges in 4H silicon carbide: defects and impurities

“…At present, n-type 4H-SiC had achieved industrial application, while the popular size of SiC in the market was mainly 4 inches and 6 inches, but 8 inches of products were still in the process. n-type SiC can be utilized in the production of high-power devices such as MOSFETs et al [123,124]. Due to its low resistivity and high carrier concentration, high-power and efficient power based on 4H-SiC can be conversed.…”

Review of the SiC LDMOS power device

“…Some studies have demonstrated that the trench-gate technology effectively reduces both R on,sp and the threshold voltage, primarily attributed to increased doping concentration [29][30][31][32][33][34] . As shown in Fig.…”

Synergistic effect of total ionizing dose on single-event gate rupture in SiC power MOSFETs

“…Then the concentrations and characteristics of the bulk oxide and interface traps (e.g., energy level, capture cross-section) were initially defined in the oxide layer and the initial electron-hole density was defined to be approximately 1 × 10 13 cm −3 -1 × 10 15 cm −3 . After that, the SRH composite model, [32] Auger model, [33] CVT model, [34] Fermi-Dirac statistics model, band gap narrowing model, and bound-trap model were considered. Among them, the bound-trap model is specific for the TID effect, which enables modeling of traps coincident with ohmic boundaries.…”