Implementations of artificial neural networks using current-mode pulse width modulation technique

El-Masry, E.I.; Yang, Hong-Kui; Yakout, Mohamed

doi:10.1109/72.572093

Cited by 27 publications

(5 citation statements)

References 20 publications

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“…In fact, the original neuromorphic definition by Carver Mead referred to analog circuits that operated in subthreshold mode [1]. There are a large variety of other neuromorphic analog implementations [7], [8], [12], [14], [17]- [19], [99], [100], [323], [324], [326]- [329], [331]- [333], [335]- [372], [374]- [387], [516], [571], [572], [578]- [580], [594]- [603], [606]- [610], [612]- [614], [620]- [640], [642]- [646], [648]- [653], [655]- [664], [666]- [683], [685]- [699], [701]- [703], [705]- [719], [722]- …”

Section: A High-levelmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

173

180

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Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture. This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems. The promise of the technology is to create a brainlike ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities. In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history. We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications. We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled. The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed.

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Section: A High-levelmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

173

180

View full text Add to dashboard Cite

show abstract

“…A better review of some of these WTAs can be found in [16,25,28]. A different kind of design methodology, the WTA circuits of pulse-coded operation were presented in [29,30]. In general, the performance of these WTA circuits is degraded with the increase of the number of inputs.…”

Section: Introductionmentioning

confidence: 98%

1-V bulk-driven CMOS analog programmable winner-takes-all circuit

Hung

Liu

Tsai

2006

Analog Integr Circ Sig Process

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In this paper, a 1-V bulk-driven analog winnertakes-all circuit with programmable k-winners capability is proposed. By presetting a set of binary bits, the desired k-winners-take-all or k-losers-take-all function is programmable. The proposed upward-and-downward searching greatly improves the response time. The chip has been fabricated with a 0.25-µm CMOS technology. Simulated results show that the response time of the winner-takes-all circuit is 50 µs under 5-mV identified resolution. The input range is approximately to be rail-to-rail.

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“…Certain pulse techniques, such as pulse width or pulse stream, have also been investigated to implement artificial NNs. For example, El-Masry et al reported an efficient implementation of artificial NNs using a current-mode pulse width modulation artificial NN [11]. Moreover, Murray et al proposed a VLSI NN using analog and digital techniques [12].…”

Section: Introductionmentioning

confidence: 99%

FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation

Maeda

Tada

2003

IEEE Trans. Neural Netw.

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Hardware realization is very important when considering wider applications of neural networks (NNs). In particular, hardware NNs with a learning ability are intriguing. In these networks, the learning scheme is of much interest, with the backpropagation method being widely used. A gradient type of learning rule is not easy to realize in an electronic system, since calculation of the gradients for all weights in the network is very difficult. More suitable is the simultaneous perturbation method, since the learning rule requires only forward operations of the network to modify weights unlike the backpropagation method. In addition, pulse density NN systems have some promising properties, as they are robust to noisy situations and can handle analog quantities based on the digital circuits. We describe a field-programmable gate array realization of a pulse density NN using the simultaneous perturbation method as the learning scheme. We confirm the viability of the design and the operation of the actual NN system through some examples.

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Implementations of artificial neural networks using current-mode pulse width modulation technique

Cited by 27 publications

References 20 publications

A Survey of Neuromorphic Computing and Neural Networks in Hardware

A Survey of Neuromorphic Computing and Neural Networks in Hardware

1-V bulk-driven CMOS analog programmable winner-takes-all circuit

FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation

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