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With the rapid development of web techniques, information and communication technology is being increasingly used in curricula, and learning portfolios can be automatically retrieved and maintained as learners interact through e-learning platforms.Further, massive open online courses (MOOCs), which apply such technology to provide open access to hundreds and thousands of learners, have recently gained popularity in higher education. Learning styles refer to an individual's approach to learning based on their preferences, strengths and weaknesses. It was speculated that different learning styles could affect a learner's preference for MOOCs. Therefore, in this study, we investigated the influence of learning styles on the learners' intentions to use MOOCs. The participants comprised 184 undergraduate students, who were surveyed regarding their learning experiences, motivation and intentions to use MOOCs. The results showed that learners with a high-reflective learning style tended to have less experience in using MOOCs. Using the K-means algorithm, we also clustered the multiple learning styles and found a 90% probability that the type of learning styles does influence learner intentions. Finally, we explored the reasons why learners used MOOCs, analyzed the learning approaches that could assist learning in MOOCs and examined the correlation between learning styles and user intention.

In this paper, a low-power high-speed CMOS full adder core is proposed for embedded system. Based on a new three-input exclusive OR (3-XOR) design, the new hybrid full adder is composed of pass-transistor logic and static CMOS logic. The main design objectives for the full adder core are providing not only low power and high speed but also with driving capability. Using TSMC CMOS 0.35-µm technology, the characteristics of the experimental circuit compared with prior literature show that the new adder improves 1.8% to 35.6% in power consumption, 11.7% to 41.2% in time delay of Co, and 13.7% to 91.4% in power-delay product of Co. The circuit is proven to have the minimum power consumption and the fastest response of carry out signal among the adders selected for comparison. Due to the low-power and high-speed properties, both the new exclusive OR circuit and the new full adder can be efficiently integrated in a system-on-a-chip (SoC) or an embedded system.

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