2007
DOI: 10.1088/0960-1317/17/6/014
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Implementation of three-dimensional SOI-MEMS wafer-level packaging using through-wafer interconnections

Abstract: Packaging is an emerging technology for microsystem integration. The silicon-on-insulator (SOI) wafer has been extensively employed for micromachined devices for its reliable fabrication steps and robust structures. This research reports a packaging approach for silicon-oninsulator-micro-electro-mechanical system (SOI-MEMS) devices using through-wafer vias and anodic bonding technologies. Through-wafer vias are embedded inside the SOI wafers, and are realized using laser drilling and electroplating. These vias… Show more

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Cited by 46 publications
(26 citation statements)
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“…Moreover, the step coverage of metal-based alloys is not as good as the glass-frit, since the thickness of these alloys is typically limited to few micrometers, mostly due to their high stress. There are also examples of verticallytransferred sensor leads in the literature [12]- [18]. These approaches typically require the drilling of the silicon or glass substrates by using a laser [12], DRIE [13]- [15], or wet etching [16], [17] and then hermetic filling of these trenches with thermal oxidation [15], metal bumps/patterning [16], [17], glass reflow [13], [14], or metal electroplating [12], [18].…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Moreover, the step coverage of metal-based alloys is not as good as the glass-frit, since the thickness of these alloys is typically limited to few micrometers, mostly due to their high stress. There are also examples of verticallytransferred sensor leads in the literature [12]- [18]. These approaches typically require the drilling of the silicon or glass substrates by using a laser [12], DRIE [13]- [15], or wet etching [16], [17] and then hermetic filling of these trenches with thermal oxidation [15], metal bumps/patterning [16], [17], glass reflow [13], [14], or metal electroplating [12], [18].…”
Section: Introductionmentioning
confidence: 99%
“…These approaches typically require the drilling of the silicon or glass substrates by using a laser [12], DRIE [13]- [15], or wet etching [16], [17] and then hermetic filling of these trenches with thermal oxidation [15], metal bumps/patterning [16], [17], glass reflow [13], [14], or metal electroplating [12], [18]. Therefore, they either suffer complex process steps such as void-free hermetic-filling of the feedthrough openings [12], [15] or trench-refill processes [13], [16], [18]. Another challenge with the vertical feedthrough processes is to ensure precise control of the thicknesses and the relative offsets of the sealing material, sensor leads, sealing regions, and vertical feedthroughs [18], in order to achieve the sealing and the lead transfer simultaneously.…”
Section: Introductionmentioning
confidence: 99%
“…For instance, approaches to fabricate through-wafer vias in a capping wafer have been reported [6,7]. Through-wafer vias embedded inside the substrate of MEMS devices are employed in [8][9][10][11].…”
Section: Introductionmentioning
confidence: 99%
“…In the last decades through wafer electrical connections became a more and more important issue for different applications, mainly for 3D integration of MEMS (Micro-Electro-Mechanical systems), like wafer-level packaging or vertical connections in multi-wafer devices [1][2]. Manufacturing involve two problems: through wafer via holes manufacturing and holes filling with a conductive layer.…”
Section: Introductionmentioning
confidence: 99%