Abstract:A GaN-based light-emitting diode (LED) grown on a nanocomb-shaped patterned sapphire substrate (PSS) is fabricated and studied. Nanocomb-shaped patterns are transferred on a sapphire substrate using a well-ordered anodized aluminum oxide (AAO) thin film as a mask for the inductively coupled plasma etching process. This well-ordered AAO thin film with a high aspect ratio is grown on a sapphire substrate by an oxalic acid-based electrochemical system and a threestep anodization. The strain state generated during… Show more
“…Here, a nanosphere-assisted patterning (NAP) technique involving oxygen plasma treatment has been developed to form the nanonet structure. The NAP technique with the advantages of inexpensive equipment and the capability of large-area patterning, has been widely used to realize periodic photonic devices [ 23 , 24 ], solar cell [ 25 ], biological devices [ 26 , 27 ], and electrical sensors [ 28 , 29 ].…”
We present the fabrication and electrical characteristics of nanonet-channel (NET) low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs) using a nanosphere-assisted patterning (NAP) technique. The NAP technique is introduced to form a nanonet-channel instead of the electron beam lithography (EBL) or conventional photolithography method. The size and space of the holes in the nanonet structure are well controlled by oxygen plasma treatment and a metal lift-off process. The nanonet-channel TFTs show improved electrical characteristics in terms of the ION/IOFF, threshold voltage, and subthreshold swing compared with conventional planar devices. The nanonet-channel devices also show a high immunity to hot-carrier injection and a lower variation of electrical characteristics. The standard deviation of VTH (σVTH) is reduced by 33% for a nanonet-channel device with a gate length of 3 μm, which is mainly attributed to the reduction of the grain boundary traps and enhanced gate controllability. These results suggest that the cost-effective NAP technique is promising for manufacturing high-performance nanonet-channel LTPS TFTs with lower electrical variations.
“…Here, a nanosphere-assisted patterning (NAP) technique involving oxygen plasma treatment has been developed to form the nanonet structure. The NAP technique with the advantages of inexpensive equipment and the capability of large-area patterning, has been widely used to realize periodic photonic devices [ 23 , 24 ], solar cell [ 25 ], biological devices [ 26 , 27 ], and electrical sensors [ 28 , 29 ].…”
We present the fabrication and electrical characteristics of nanonet-channel (NET) low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs) using a nanosphere-assisted patterning (NAP) technique. The NAP technique is introduced to form a nanonet-channel instead of the electron beam lithography (EBL) or conventional photolithography method. The size and space of the holes in the nanonet structure are well controlled by oxygen plasma treatment and a metal lift-off process. The nanonet-channel TFTs show improved electrical characteristics in terms of the ION/IOFF, threshold voltage, and subthreshold swing compared with conventional planar devices. The nanonet-channel devices also show a high immunity to hot-carrier injection and a lower variation of electrical characteristics. The standard deviation of VTH (σVTH) is reduced by 33% for a nanonet-channel device with a gate length of 3 μm, which is mainly attributed to the reduction of the grain boundary traps and enhanced gate controllability. These results suggest that the cost-effective NAP technique is promising for manufacturing high-performance nanonet-channel LTPS TFTs with lower electrical variations.
“…To this end, the photon escaped from the gallium nitride (GaN) sidewall can be increased by reducing the TIR, thereby realizing the improvement of light extraction efficiency (LEE) and light efficiency [14][15][16]. Several advantageous approaches have been put forward to increase the LEE, such as patterned sapphire substrates [17][18][19], textured surfaces [19][20][21][22], SiO 2 MS/MP [9,23,24], composite transparent conductive layer [5,25], microlens array [26,27], and photon crystals [16,28,29]. Meanwhile, the LEE can be improved by roughening the bottom [30] or sidewalls of the LED.…”
We demonstrate that the concave-convex circular composite structure sidewall prepared by inductively coupled plasma (ICP) etching is an effective approach to increase the light efficiency without deteriorating the electrical characteristics for micro light-emitting diodes (LEDs). The saturated light output power of the device using the concave-convex circular composite structure sidewalls with a radius of 2 μm is 39.75 mW, an improvement of 7.2% compared with that of the device using flat sidewalls. The enhanced light output characteristics are primarily attributed to the increased photon emitting due by decreasing the total internal reflection without losing the active region area.
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