Impact of source/drain contacts formation of self‐aligned amorphous‐IGZO TFTs on their negative‐bias‐illumination‐stress stabilities

Nag, Manoj; Bhoolokam, Ajay; Genoe, Jan; Cobb, Brian; Kumar, Abhishek; Groeseneken, G.; Heremans, Paul

doi:10.1002/jsid.351

Cited by 4 publications

(5 citation statements)

References 22 publications

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“…The electrical properties of the device show field-effect mobility (μ FE ) of 13.2 cm 2 /Vs, subthreshold swing (SS) of 0.32 V/decade, threshold voltage (V th ) of 3.2 V, and on/off ratio of 8.8 × 10 8 and these values are reasonably good compared with the other reported experimental results for self-aligned coplanar a-IGZO TFTs. 6,8,10,18,19 To determine the device stability of self-aligned coplanar a-IGZO TFTs with DUV irradiation, we evaluated stability behavior of the device under negative bias stress (NBS), negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias temperature stress (PBTS) conditions. Figure 5 shows the transfer characteristics of TFTs as a function of time under NBS, NBIS, PBS, and PBTS conditions.…”

Section: Resultsmentioning

confidence: 99%

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Stability Behavior of Self-Aligned Coplanar a-IGZO Thin Film Transistors Fabricated by Deep Ultraviolet Irradiation

Kim

Choi

Jeon

et al. 2018

ECS J. Solid State Sci. Technol.

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We fabricated self-aligned coplanar amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs and defined the source/drain region using deep ultraviolet (DUV) irradiation. For our TFTs, source/drain region were well defined to designed dimensions and contact resistance was low value. The electrical properties of the device show field-effect mobility (μ FE ) of 13.2 cm 2 /Vs, subthreshold swing (S/S) of 0.32 V/decade, threshold voltage (V th ) of 3.2 V, and on/off ratio of 8.8 × 10 8 , respectively. In addition, the reduced channel length ( L) and width-normalized contact resistance (R SD W) were 1.08 μm and 87.5 cm, respectively. Stability behavior of self-aligned coplanar a-IGZO TFT fabricated by DUV irradiation was investigated under negative bias stress (NBS), negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias temperature stress (PBTS). After the stress under NBS, NBIS, PBS, and PBTS, the V th values of −0.3 V, −0.8 V, 1.2 V, and 1.3 V were measured, respectively. Additionally, the electrical characteristics of the n+ doping region by DUV irradiation were not degraded under any of the stress conditions. © The Author Amorphous oxide semiconductors (AOS) have been intensively studied as promising materials for active layer of thin film transistors (TFTs) because of their low off-current, high mobility, and good switching properties compared to amorphous silicon (a-Si)-based TFTs. Among the many oxide TFTs, amorphous In-Ga-Zn-O (a-IGZO) TFTs have been commercialized as backplanes of organic light emission display (OLED) TVs due to their high mobility. 1,2Oxide TFTs with conventional bottom-gate structures such as back channel etch (BCE) and etch-stopper layer (ESL) structure have been widely applied in display back-plane. However, these structures have high parasitic capacitance induced by overlap between gate and source/drain electrodes.3 This parasitic capacitance can generate a voltage drop, which results in brightness non-uniformity, flickering, and image lagging in flat panel displays (FPDs). Self-aligned coplanar structured TFTs are candidate next-generation FPDs because overlap between gate and source/drain electrodes can be minimized, reducing parasitic capacitance. 4,5 In previous research, we reported selfaligned coplanar a-IGZO top gate TFTs with various DUV irradiation energies. 6 The n+ doping techniques using DUV irradiation is a very simple process. In addition, the self-aligned coplanar TFTs fabricated by DUV irradiation have attractive results for reduced channel length ( L) and width-normalized contact resistance (R SD W) compared to other n+ doping methods. [6][7][8][9] We observed that the electrical properties of n+ regions were stable at elevated temperatures. However, to use these self-aligned TFTs fabricated by DUV irradiation as back planes for OLEDs, the behavior of TFT stability under various stress conditions needs to be studied. In a self-aligned coplanar structure, the electrical characteristics of the n+ doping region formed by diffusion of hydrogen or/...

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Section: Resultsmentioning

confidence: 99%

“…For these reasons, it is important to evaluate changes in electrical properties of the n+ doping region of self-aligned coplanar oxide TFTs under various stress conditions. 10 However, the effect of stress on the n+ doping region of self-aligned coplanar oxide TFTs has not been considered in previous studies.…”

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confidence: 99%

Stability Behavior of Self-Aligned Coplanar a-IGZO Thin Film Transistors Fabricated by Deep Ultraviolet Irradiation

Kim

Choi

Jeon

et al. 2018

ECS J. Solid State Sci. Technol.

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“…5−7 The self-aligned structure has highly conductive source/drain access regions formed by plasma treatment, dry etch, metal reaction, or hydrogen diffusion. 8,9 Furthermore, the selfaligned top-gate structure is advantageous due to the better controllability of the channel interface properties by subsequent processes such as plasma treatment, gate insulator (GI) deposition, and thermal annealing. The self-aligned topgate structure allows tailoring of the amount of interfacial mixing with SiO 2 , optimization of stoichiometry, and minimizing the amount of point defects.…”

Section: Introductionmentioning

confidence: 99%

“…Amorphous oxide semiconductor thin-film transistors (TFTs) have matured into a key component in large-screen, high-resolution displays, and low-power mobile and wearable applications due to their good large-area uniformity, low-temperature fabrication process, and low off-current. Furthermore, amorphous oxide semiconductor transistors have been gaining interest in hybrid integration with low-temperature poly-Si or Si CMOS technology, due to their low off-state current. − Especially, the amorphous InGaZnO (IGZO) self-aligned top-gate structure TFT is a compelling device solution; where IGZO exhibits good device performance and stability, relatively wide process margin; and where the self-aligned structure has a smaller device footprint and lower parasitic capacitance compared to bottom-gate structure devices. − The self-aligned structure has highly conductive source/drain access regions formed by plasma treatment, dry etch, metal reaction, or hydrogen diffusion. , Furthermore, the self-aligned top-gate structure is advantageous due to the better controllability of the channel interface properties by subsequent processes such as plasma treatment, gate insulator (GI) deposition, and thermal annealing. The self-aligned top-gate structure allows tailoring of the amount of interfacial mixing with SiO 2 , optimization of stoichiometry, and minimizing the amount of point defects. , …”

Section: Introductionmentioning

confidence: 99%

Cation Composition-Dependent Device Performance and Positive Bias Instability of Self-Aligned Oxide Semiconductor Thin-Film Transistors: Including Oxygen and Hydrogen Effect

Jang

Kim

Baeck³

et al. 2022

ACS Appl. Mater. Interfaces

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Amorphous oxide semiconductor transistors control the illuminance of pixels in an ecosystem of displays from largescreen TVs to wearable devices. To satisfy application-specific requirements, oxide semiconductor transistors of various cation compositions have been explored. However, a comprehensive study has not been carried out where the influence of cation composition, oxygen, and hydrogen on device characteristics and stability is systematically quantified, using commercial-grade process technology. In this study, we fabricate self-aligned topgate structure thin-film transistors with three oxide semiconductor materials, InGaZnO (In/Ga/Zn = 1:1:1), In-rich InGaZnO, and InZnO, having mobility values of 10, 27, and 40 cm 2 /V•s, respectively. Combinations of varied amounts of oxygen and hydrogen are incorporated into each transistor by controlling the fabrication process to study the effect of these gaseous elements on the physical nature of the channel material. Electrons can be captured by peroxy linkage (O 2 2− ) or undercoordinated In (In* to become In + ), which are manifested in the extracted subgap density-of-states profile and first-principles calculations. Energy difference between electron-trapped In + and O 2 2− σ* is the smallest for IGZO, and In + −O 2 2− annihilation occurs by electron excitation from the subgap In + state to the O 2 2− σ*. Furthermore, characteristic time constants during positive bias stress and recovery reveal the various microscopic physical phenomena within the transistor structure between different cation compositions.

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“…In Nag et al ., 2015, Robert Müller should have been included as the second author in the published article.…”

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confidence: 99%