Impact of parasitics on even symmetric split‐capacitor arrays

Abstract

This paper analyzes the impact of parasitic capacitances in the performance of split capacitive‐based digital‐to‐analog converter arrays and presents a procedure for the optimal sizing of these structures for given linearity specifications. It also demonstrates that parasitics are often the main responsible for the nonlinear behavior of these arrays, particularly for low‐to‐medium resolution converters. In order to validate the analysis, two versions of a complete low‐power, low‐voltage successive‐approximation register analog‐to‐digital converter (ADC), intended for a disposable multi‐channel bio‐medical monitoring system, have been fabricated in a 0.35 µm standard complementary metal‐oxide‐semiconductor technology. The only difference between these two prototypes is that in one of them, the capacitive array is surrounded by dummy capacitors, while in the other prototype is not. Hence, the former achieves better mismatch performance at the expense of increased parasitics. The experimental results demonstrate that the version without dummy capacitors obtains higher effective resolution than the ADC with dummies, the power consumption being essentially the same for both prototypes, namely: 130nW at 2kS/s from a 1‐V supply. These results are in full agreement with the analysis reported in the paper and confirm the proposed sizing procedure. Copyright © 2012 John Wiley & Sons, Ltd.

A 9‐bit successive approximation ADC in SOI CMOS operating up to 300 °C

“…Conventional submicron CMOS processes are used in [6][7][8], which support operating voltage down to 1.0 V. But the threshold voltage and mobility of transistors are reducing as the temperature increases. At high temperature, a too low threshold voltage leads to circuit failure.…”

“…As illustrated in Figure 2, capacitors C 1 -C 9 are controlled by switches S 1 -S 9 . Although split capacitor array can reduce the total area cost of the capacitors, it is more sensitive to the parasitic effects and requires complex on-chip or off-chip calibrations [7]. Although split capacitor array can reduce the total area cost of the capacitors, it is more sensitive to the parasitic effects and requires complex on-chip or off-chip calibrations [7].…”

“…A generic setup based on logical analyzer (Agilent 16802A), signal generators (Agilent), and precision power supplies (Hewlett Packard) is built to measure the ADC [6][7][8]. A generic setup based on logical analyzer (Agilent 16802A), signal generators (Agilent), and precision power supplies (Hewlett Packard) is built to measure the ADC [6][7][8].…”

“…As an example, a simplified underground measurement-while-drilling integrated system is shown in Figure 1, in which data acquisition is performed for various sensing parameters, such as pressure, resistivity, and temperature. Unlike the applications in portable wireless communication systems or biomedical devices [6][7][8], where SAR ADCs are usually targeting extremely small area and very low operating voltage, the biggest challenge for the measurement-while-drilling system is to operate properly at high-temperature (HT) like 200-300°C with reasonably low power consumption. For such an application, regarding power consumption, circuit complexity, and moderate resolution (7-10 bits), successive approximation register analog-to-digital converter (SAR ADC) becomes a good candidate compared with other kinds of ADCs.…”

“…The data are transmitted back to the ground through telemetry, which helps assess drilling progress and the condition of drilling hardware [2,4]. Most SAR ADCs [6][7][8][9] implemented in conventional complementary metal-oxide semiconductor (CMOS) technology operate maximal up to 125°C. Unlike the applications in portable wireless communication systems or biomedical devices [6][7][8], where SAR ADCs are usually targeting extremely small area and very low operating voltage, the biggest challenge for the measurement-while-drilling system is to operate properly at high-temperature (HT) like 200-300°C with reasonably low power consumption.…”