Impact of HZO and HSO thin film ferroelectric on FDSOI NCFET

Shaik, Rameez Raja; Pradhan, K P

doi:10.1109/nano51122.2021.9514307

Cited by 4 publications

(3 citation statements)

References 17 publications

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“…And, the ferroelectric parameters were analysed and chosen to best fit with the measured data of HSO MFM capacitor i.e. α = −4.45 × 10 10 cm F −1 , β = 3.4 × 10 20 cm FCoul 2 & γ is neglected for doped-HfO 2 based ferroelectrics [7,16,17,36]. A good agreement with measured P-E characterises and Scurve obtained by modeling the HSO MFM capacitor can be depicted in figure 3(b).…”

Section: Hso Mfm Capacitor Validationmentioning

confidence: 99%

“…It is worth noting that, some postulations say the nature of NCFET maybe invalid due to obscurity in device physics consideration [4]. But, a proof-of-concept [5] along with the support of extensive analytical and numerical simulation investigations [6][7][8][9][10][11][12][13][14][15][16][17][18] for NCFET contradict this claim. Hence, this is reaffirming that ferroelectric capacitor when operated in linear or hysteresis free region can certainly amplify V GS by virtue of its negative capacitance (NC) property [19].…”

Section: Introductionmentioning

confidence: 99%

“…With these hypotheses in place, the next course of action is to realize MFMIS NCFET with ferroelectric capacitor gatestacking on baseline-FDSOI (MIS structure) with a widely used and accepted Landau-Khalatnikov (L-K) model under steady-state NC operation [11][12][13][14][15][16][17]. Zirconium doped HfO 2 (HZO) has been a firm choice of thin-film ferroelectric explored for NCFET applications [12,28].…”

Section: Introductionmentioning

confidence: 99%

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Investigation on performance degradation due to induced interface trapped charges on HSO based FDSOI NCFET and sustaining it through back-gate bias

Shaik¹,

Pradhan²

2022

Semicond. Sci. Technol.

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In this article, a variant of doped HfO\textsubscript{2} based ferroelectric capacitor i.e., silicon doped HfO\textsubscript{2} (hafnia-silica / HSO) is investigated for analytical feasibility and viability for negative capacitance FET (NCFET) applications. Investigations are carried out extensively using well calibrated and validated numerical simulations to find out the optimum ferroelectric thickness (t\textsubscript{f}) of HSO thin-film for the NCFET to operate in hysteresis-free regime. The optimized NCFET is then subjected to the variation of back-gate bias (V\textsubscript{B}) to exploit threshold-voltage (V\textsubscript{TH}) shift phenomena might further improve NCFET performance. In continuance, the optimized NCFET has been introduced with interface trap (+N\textsubscript{it}) charges at the oxide-semiconductor interface to emphasize on the reliability deflation caused at process level design. Hence, this has allowed us to concisely observe and analyse performance degradation aspect of the NCFET with numerical simulations. Also, a feasibility to recuperate the degraded performance caused by +N\textsubscript{it} with utilizing -V\textsubscript{B} is carried out. The performance metrics used in the numerical simulation for the evaluation of HSO ferroelectric NCFET are: sub-threshold slope (SS), charge variation with gate-voltage and ferro voltage, surface potential, V\textsubscript{TH}, drain-current and amplification factor.

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Section: Hso Mfm Capacitor Validationmentioning

confidence: 99%