IEEE P1581 ¿ Getting More Board Test Out of Boundary Scan

Abstract

IEEE P1581 has undergone significant improvement since its introduction. This paper explains the choice of simple, low overhead solutions the proposed standard provides in overcoming one of Boundary Scan's greatest bottlenecks: test of complex memory devices. Design for Testability guidelines are provided to allow board designers and test engineers to take full advantage of this new test technique.

IEEE Std 1581 — A standardized test access methodology for memory devices

“…If the read data differs from the previously written data, an error has been detected. The diagnostic detail that can be obtained depends on the set of data [2] [4].…”

“…IEEE Std 1581 requires no extra pins, does not rely on complex memory access cycles, allows faster test execution when compared with boundary scan based memory access test, and requires only a small test vector set. Furthermore, IEEE Std 1581 is usable with many access methodologies (such as boundary scan or in-circuit test) [2].…”