<i>In situ</i> analyses on negative ions in the indium-gallium-zinc oxide sputtering process

Jia, Junjun; Torigoshi, Yoshifumi; Shigesato, Yuzo

doi:10.1063/1.4812668

Cited by 35 publications

(26 citation statements)

References 24 publications

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“…In this study, off-axis sputtering was used to confirm this possible mechanism. In general, negative oxygen ions are considered to be the origin of the bombardment effect because of their high energy (approximately several hundred electron volts) [6]. In the sputtering process, negative oxygen ions are accelerated by the cathode sheath and move towards the substrate in a straight path; thus, the bombardment effect from the high-energy particles should be observed in the facing position, as shown in Fig.…”

Section: Bombardment Effectmentioning

confidence: 99%

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On the Crystal Structural Control of Sputtered TiO2 Thin Films

et al. 2016

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In this study, we focused on the origin on the selective deposition of rutile and anatase TiO 2 thin films during the sputtering process. The observation on microstructural evolution of the TiO 2 films by transmission electron microscopy revealed the coexistence of rutile and anatase TiO 2 phases in the initial stage under the preferential growth conditions for the anatase TiO 2 ; the observations further revealed that the anatase phase gradually dominated the crystal structure with increasing film thickness. These results suggest that the bombardment during the sputtering deposition did not obviously affect the TiO 2 crystal structure, and this was also confirmed by off-axis magnetron sputtering experiments. We also investigated the mechanism of the effect of Sn impurity doping on the crystal structure using first-principles calculations. It is found that the formation energy of Sn-doped rutile TiO 2 is lower than that of Sn-doped anatase TiO 2 ; this suggests that the Sn-doped TiO 2 favours the rutile phase. These results offer a guideline for the utilization of selective deposition of rutile and anatase TiO 2 thin films in various industrial applications.

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Section: Bombardment Effectmentioning

confidence: 99%

“…Sputtering deposition can be used to produce uniform TiO 2 thin films with a large area, high packing density and strong adhesion [1,6]. However, TiO 2 films deposited by magnetron sputtering are often a mixture of anatase and rutile phases.…”

Section: Introductionmentioning

confidence: 99%

On the Crystal Structural Control of Sputtered TiO2 Thin Films

et al. 2016

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“…Our recent supercomputer simulations suggested that atomic particles considered to be sputtered from the target like pellets are likely to be adsorbed on the side of pellets rather than the top. Presumably, the surfaces of pellets are negatively charged in the plasma atmosphere [11] [12]. According to this assumption, we propose a mechanism shown in Figure 4 [13].…”

Section: Crystal-deposition Modelmentioning

confidence: 74%

45.1: Invited Paper: Future Possibilities of Crystalline Oxide Semiconductor, Especially C‐Axis‐Aligned Crystalline IGZO

Yamazaki

Matsuo²

2015

Symp Digest of Tech Papers

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“…It was reported that the energetic bombardment of negative oxygen ion, which was accelerated by the applied electric field between the substrate and the target in DC magnetron sputtering, would be the reason for the GI/channel interface damage. 26,27 Since all TFTs were fabricated under the same conditions exception for IGZO deposition temperature, it is reasonable to assume that the qualities of SiO x GIs are similar for all TFTs. On the other hand, it is also well established that trapped carriers in a GI are mainly determined by gate bias stress and GI quality.…”

Section: Resultsmentioning

confidence: 99%

Quantitative Analysis of Hole-Trapping and Defect-Creation in InGaZnO Thin-Film Transistor under Negative-Bias and Illumination-Stress

Hung

Wang

Toda

et al. 2014

ECS J. Solid State Sci. Technol.

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We report two measurement methods, named positive gate pulse mode (PGPM) and double sweeping mode (DSM), which can estimate the hysteresis induced by hole trapping in a gate insulator ( V hole ) and by defect creation in the IGZO channel ( V defect ). The effects of IGZO deposition temperature and of stress temperature on defect creation in the channel under negative bias and illumination stress (NBIS) are investigated. The results show that high deposition temperature of IGZO reduces defect creation in the channel under NBIS. The average activation energy for hole trapping in a GI under NBIS has been calculated to be 0.39 eV. InGaZnO (IGZO) thin-film transistors (TFTs) with field effect mobility >10 cm 2 /(V · s) are now used in high definition, large area ether active matrix liquid crystal displays (AMLCD) and active matrix organic light emitting diode displays (AMOLED).1,2 However, the reliability of IGZO TFTs under negative bias and illumination stress (NBIS) still requires improvement. Three possible reasons for NBIS instability in IGZO TFTs have been reported: (i) hole trapping in a gate insulator (GI), 3,4 (ii) donor like defect creation in the IGZO channel, [5][6][7] and (iii) electron trapping at a back channel interface. 8 Many efforts to improve NBIS reliability of IGZO TFT have been reported. 9-14 Hole trapping at front channel interface could be reduced by using AlO x as a gate insulator 9 or by using TiO 2 as a hole blocking layer. 14 The donor like state creation could be reduced by annealing IGZO TFTs in a high pressure water vapor, 10 wet O 2 , 11 hydrogen environment. 12 An AlO x , SrO x passivation layer could be used to suppress deep subgap defects in the IGZO channel. 13 In our previous study, 8 both hole trapping in a GI and donor like state creation in an IGZO channel induced hysteresis (V h ) in an IGZO TFT under NBIS. However, unlike a-Si TFT, the NBIS degradation mechanism in IGZO TFT is not consistent. It depends on the TFT structure, 15 the IGZO composition 16 and the fabrication process.17 Therefore, an understanding of the contribution of hole trapping in a GI and donor like state creation in an IGZO channel to V h is essential in the work to improve oxide TFT stability.Capacitance-voltage measurement is usually used to detect defect creation in the IGZO channel. 18,19 Subthreshold voltage swing [Ss = dV g /d log I D (V/decade)] could also be used to estimate the total number of generated defects ( N defect ) using the equation:[1]The threshold voltage shift induced by generated defects ( V defect ) can be calculated using the following equation:where C i is gate capacitance per unit area, q is the elementary charge, K is the Boltzmann constant and T is the absolute temperature (K). However, to the best of our knowledge, there is no direct method for separately measuring of hysteresis induced by trapped hole in a gate insulator ( V hole ) and hysteresis induced by defect creation in a channel ( V defect ). In this study, we demonstrate our developed measurement method, referred to i...

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In situ analyses on negative ions in the indium-gallium-zinc oxide sputtering process

Cited by 35 publications

References 24 publications

On the Crystal Structural Control of Sputtered TiO2 Thin Films

On the Crystal Structural Control of Sputtered TiO2 Thin Films

45.1: Invited Paper: Future Possibilities of Crystalline Oxide Semiconductor, Especially C‐Axis‐Aligned Crystalline IGZO

Quantitative Analysis of Hole-Trapping and Defect-Creation in InGaZnO Thin-Film Transistor under Negative-Bias and Illumination-Stress

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