High work-function metal gate and high-k dielectrics for charge trap flash memory device applications

Jeon, Sanghun; Han, Jeong Hee; Lee, Junghoon; Choi, Cheol Jong; Choi, Seong Hee; Hwang, Hyunsang; Kim, Chungwoo

doi:10.1109/essder.2005.1546651

Cited by 3 publications

(1 citation statement)

References 10 publications

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“…[ 12 , 13 ] The CTM mechanism is identical to the charge‐trap flash (CTF) memory, in which reversible charge trapping and de‐trapping to the charge trap layer alter the threshold voltage of the transistor. [ 14 , 15 , 16 ] Unlike the three‐terminal CTF, the two‐terminal CTM directly reads the conductance change through the charge trap layer, allowing higher density and simpler operation. [ 17 , 18 , 19 ] However, as the programming and reading operations share identical terminals, there is a contradiction between the stability of the trapped charges (i.e., retention) and the reliability of the programming process (i.e., writing or erasing).…”

Section: Introductionmentioning

confidence: 99%

Retention Secured Nonlinear and Self‐Rectifying Analog Charge Trap Memristor for Energy‐Efficient Neuromorphic Hardware

et al. 2022

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A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved. Here, a Pt/Ta 2 O 5 /Nb 2 O 5‐ x /Al 2 O 3‐ y /Ti CTM stack exhibiting high retention and array‐level uniformity is proposed, allowing a highly reliable selector‐less MCA. It shows high self‐rectifying and nonlinear current‐voltage characteristics below 1 µA of programming current with a continuous analog switching behavior. Also, its retention is longer than 10 5 s at 150 °C, suggesting the device is highly stable for non‐volatile analog applications. A plausible band diagram model is proposed based on the electronic spectroscopy results and conduction mechanism analysis. The self‐rectifying and nonlinear characteristics allow reducing the on‐chip training energy consumption by 71% for the MNIST dataset training task with an optimized programming scheme.

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Section: Introductionmentioning

confidence: 99%

Retention Secured Nonlinear and Self‐Rectifying Analog Charge Trap Memristor for Energy‐Efficient Neuromorphic Hardware

et al. 2022

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Fabrication and electrical characterization of MONOS memory with novel high- k gate stack

Liu

Chan

et al. 2009

2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)

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A novel high-K gate stack structure with HfON/Si0 2 as dual tunneling layer (DTL), AIN as charge storage layer (CSL) and HfAIO as blocking layer (BL) is proposed to prepare the chargetrapping type of MONOS non-volatile memory device by employing in-situ sputtering method. The memory window, program/erase and retention properties are investigated and compared with similar gate stack structure with ShNJSi0 2 as DTL, Hf0 2 as CSL and Ah03 as BL. Results show a large memory window of 3.55 V at PIE voltage of +8 V/-I5 V, high program/erase speed and good retention characteristic can be achieved using the novel Au! HfAIO/AIN/(HfON/Si0 2)/Si gate stack structure. The main mechanisms lie in the enhanced electron injection through the high-x HfON/Si0 2 DTL, high trapping efficiency of the high-K AIN material and effective blocking role of the high-K HfAIO BL.

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Memory characteristics of multilayer structures with lanthanum-aluminate charge trap by fowler-nordheim tunneling

Cha

Kim

Choi

2010

2010 3rd International Nanoelectronics Conference (INEC)

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High work-function metal gate and high-k dielectrics for charge trap flash memory device applications

Cited by 3 publications

References 10 publications

Retention Secured Nonlinear and Self‐Rectifying Analog Charge Trap Memristor for Energy‐Efficient Neuromorphic Hardware

Retention Secured Nonlinear and Self‐Rectifying Analog Charge Trap Memristor for Energy‐Efficient Neuromorphic Hardware

Fabrication and electrical characterization of MONOS memory with novel high- k gate stack

Memory characteristics of multilayer structures with lanthanum-aluminate charge trap by fowler-nordheim tunneling

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