High voltage thin layer devices (RESURF devices)

Appels, J.A.; Vaes, H.M.J.

doi:10.1109/iedm.1979.189589

Cited by 474 publications

(156 citation statements)

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“…Regarding device static measurement with V gs floatting, MSD presents a slight shift because of the diode conduction in comparison with the others devices, which have the same characteristics, depending on the different devices (Fig.4. ) Devices were characterized with J ds_max = 60.68 mA/mm, J ds_leak = 116 A/mm and J gs_leak = 2,68 A/mm [6]. Regarding device dynamic measurement, impedance is measured with AC signal of 0.5 V and DC signal of 0 V. A phase around 90° is observed at 10 MHz with a maximum module value at 1 MHz.…”

Section: A Three Different Topologiesmentioning

confidence: 99%

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Contribution to Silicon-Carbide-MESFET ESD Robustness Analysis

Phulpin

Isoird

Trémouilles

et al. 2018

IEEE Trans. Device Mater. Relib.

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Abstract-In this work, ElectroStatic Discharge (ESD) tests are performed on SiC MESFETs in order to understand their physical behavior and failure mechanisms during such stresses. The purpose is to point out advantages and drawbacks of this technology, paying special attention to aspects related to its possible commercialization and reliability. Three MESFETs designed to be integrated as a driver in monlithic SiC systems, featuring some ESD internal protection are investigated. Different configurations on ohmic and Schottky contacts are analyzed. Lock-in thermography is carried out for the physical failure location. With TCAD Sentaurus simulation, it allows to determine the nature of the defects on the damaged areas. Hypothesis on the failure mechanism as SiO 2 breakdown or SiC sublimation are presented. Solutions to increase the ESD robustness such as a Zener diode integration or the use of Al2O3 dielectric for passivation are therefore proposed in this article.

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Section: A Three Different Topologiesmentioning

confidence: 99%

“…The N channel is circled with a P + layer at 10 19 cm -3 for the lateral isolation, which provides with the P-layer a RESURF (REduced SURface Field effect [6]) for the electric field repartition. Phosphorus at 10 17 cm -3 (N + ) is added for increasing the source and drain contact.…”

Section: A Three Different Topologiesmentioning

confidence: 99%

Contribution to Silicon-Carbide-MESFET ESD Robustness Analysis

Phulpin

Isoird

Trémouilles

et al. 2018

IEEE Trans. Device Mater. Relib.

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“…Then a FiniteElement-Analysis simulation was run with Synopsys TCAD Suite [4]. The graphical viewing program TECPLOT, included in the Synopsys Suite, is used to generate device captures from electrical simulations that are taken at equal intervals throughout each simulation for forward conduction and reverse bias conditions.…”

Section: Interactive Web Toolmentioning

confidence: 99%

TCAD Based Power Semiconductor Device e-Learning Tool

Landowski¹,

Shen²

2010

Journal of Power Electronics

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An interactive web-based teaching tool for a power semiconductor course at the University of Central Florida is presented in this paper. A novel approach is introduced using Technology Aided Design Tools (TCAD) to generate time-lapsed 2D semiconductor device cross-section embedded in a webpage using Adobe R Flash (web design tool) platform to create interactive movies that demonstrate complex device physical phenomenon. Students can step through the interactive movies forward, backward, pausing, or looping. Each step represents a giving bias condition. Current-voltage plots are represented along with the semiconductor device and a visual point is placed on the IV curve to indicate the current bias conditions. The changes are then reflected in the 2D cross-section movie area and the IV plot. This tool was implemented in a classroom setting to augment the lectures or for discovery learning.

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“…The active region in the entire power MOSFET structure is part in which channel that controls current flow is created, occupying the most area of an element. The edge termination region plays a role of improving the breakdown voltage characteristic in the outskirt part of an element including the field-ring structure analyzed in this study [7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

A Study of Field-Ring Design using a Variety of Analysis Method in Insulated Gate Bipolar Transistor (IGBT)

Jung¹,

Kyoung²,

Chung³

et al. 2014

Journal of Electrical Engineering and Technology

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-Power semiconductor devices have been the major backbone for high-power electronic devices. One of important parameters in view of power semiconductor devices often characterize with a high breakdown voltage. Therefore, many efforts have been made, since the development of the Insulated Gate Bipolar Transistor (IGBT), toward having higher level of breakdown voltage, whereby the typical design thereof is focused on the structure using the field ring. In this study, in an attempt to make up more optimized field-ring structure, the characteristics of the field ring were investigated with the use of theoretical arithmetic model and methodologically the design of experiments (DOE). In addition, the IGBT having the field-ring structure was designed via simulation based on the finding from the above, the result of which was also analyzed. Lastly, the current study described the trench field-ring structure taking advantages of trench-etching process having the improved field-ring structure, not as simple as the conventional one. As a result of the simulation, it was found that the improved trench field-ring structure leads to more desirable voltage divider than relying on the conventional field-ring structure.

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High voltage thin layer devices (RESURF devices)

Cited by 474 publications

References 0 publications

Contribution to Silicon-Carbide-MESFET ESD Robustness Analysis

Contribution to Silicon-Carbide-MESFET ESD Robustness Analysis

TCAD Based Power Semiconductor Device e-Learning Tool

A Study of Field-Ring Design using a Variety of Analysis Method in Insulated Gate Bipolar Transistor (IGBT)

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