High-Voltage LDMOS Transistor With Split-Gate Structure for Improved Electrical Performance

Na, Kee-Yeol; Baek, Ki–Ju; Lee, Gun-Woong; Kim, Yeong-Seuk

doi:10.1109/ted.2013.2278974

Cited by 8 publications

(5 citation statements)

References 9 publications

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“…Laterally single diffused metal-oxide-semiconductor (LDMOS) field effect transistor (FET) is popularly used in automotive applications, flat panel displays, high voltage ICs, power management ICs, RADAR, motor drives, switching applications and power amplifiers [1][2][3][4][5][6][7]. Its fabrication is compatible with the standard CMOS process line and can be implemented with SOI technology for improved performance.…”

Section: Introductionmentioning

confidence: 99%

Investigation of laterally single-diffused metal oxide semiconductor (LSMOS) field effect transistor

Bansal

Kumar

2015

Current Applied Physics

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Section: Introductionmentioning

confidence: 99%

Investigation of laterally single-diffused metal oxide semiconductor (LSMOS) field effect transistor

Bansal

Kumar

2015

Current Applied Physics

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“…[1] In order to gain a high breakdown voltage(BV), a low drift doping concentration is nevertheless necessary. But the low on-resistance (R sp ) requires a high drift doping concentration.…”

Section: Introductionmentioning

confidence: 99%

Novel high-voltage LDMOS with linear graded drift region width

Yao

Guo

Zhang

et al. 2015

2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

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In this paper, a novel Lateral Diffused Metal Oxide Semiconductor (LDMOS) with linear graded drift region width is proposed. The device features a specific drift region with the lateral width increasing from source to drain, which modulates the electric field distribution and increases the doping concentration. The breakdown voltage exceeds 600V on the proposed LDMOS with 1 m SOI layer, 3 m buried oxide and 60 m drift region length. The characteristics are investigated by a three dimensional simulator. The simulation results show that a 135% increase in breakdown voltage and 5 times increase in figure of merits are achieved for the proposed device when compared with those of the conventional device.

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“…Recently, several groups have proposed a range of LDMOS structures to improve their device performance [5][6][7][8][9][10][11][12][13][14]. In advanced reduced surface field (RESURF) technologies and fieldplate gate structures, attention has been paid to the reduced device size and on-resistance (R ON ) while maintaining the breakdown voltage (BV) [5].…”

Section: Introductionmentioning

confidence: 99%

“…These techniques are effective only for the switching characteristics of power ICs. Alternatively, some LDMOS devices using gate and channel engineering have been reported [6][7][8][9][10][11][12]. These LDMOS devices are based on the splitgate field-effect transistor (SGFET) concept [13].…”

Section: Introductionmentioning

confidence: 99%

“…The modulated channel potential due to the asymmetric channel resistance can improve the device performance. One of the imple-mentations of LDMOS devices through gate engineering showed improved device performance for mixed-signal applications [6][7][8][9]. Another LDMOS device with a lateral asymmetric channel (LAC) was also shown to improve the electrical characteristics [10][11][12].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Performance Optimization of LDMOS Transistor with Dual Gate Oxide for Mixed-Signal Applications

Baek¹,

Kim²,

Na³

2015

Transactions on Electrical and Electronic Materials

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This paper reports the optimized mixed-signal performance of a high-voltage (HV) laterally double-diffused metaloxide-semiconductor (LDMOS) field-effect transistor (FET) with a dual gate oxide (DGOX). The fabricated device is based on the split-gate FET concept. In addition, the gate oxide on the source-side channel is thicker than that on the drain-side channel. The experiment results showed that the electrical characteristics are strongly dependent on the source-side channel length with a thick gate oxide. The digital and analog performances according to the source-side channel length of the DGOX LDMOS device were examined for circuit applications. The HV DGOX device with various source-side channel lengths showed reduced by maximum 37% on-resistance (R ON ) and 50% drain conductance (g ds ). Therefore, the optimized mixed-signal performance of the HV DGOX device can be obtained when the source-side channel length with a thick gate oxide is shorter than half of the channel length.

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High-Voltage LDMOS Transistor With Split-Gate Structure for Improved Electrical Performance

Cited by 8 publications

References 9 publications

Investigation of laterally single-diffused metal oxide semiconductor (LSMOS) field effect transistor

Investigation of laterally single-diffused metal oxide semiconductor (LSMOS) field effect transistor

Novel high-voltage LDMOS with linear graded drift region width

Performance Optimization of LDMOS Transistor with Dual Gate Oxide for Mixed-Signal Applications

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