High speed testing of a four-bit RSFQ decimation digital filter

Herr, Q.P.; Gaj, Kris; Herr, A.M.; Vukovic, N.; Mancini, C.A.; Bocko, Mark F.; Feldman, M.J.

doi:10.1109/77.621942

Cited by 18 publications

(6 citation statements)

References 15 publications

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“…The designed test bench is aimed at general RSFQ high frequency digital circuit testing. The circuit is based on the previously published shift register solutions [8,9] with additional shift registers for programming and monitoring the high speed clock. The design allows verification of high speed operation using only low speed equipment.…”

Section: High Frequency Test Benchmentioning

confidence: 99%

“…This method provides average information about the circuit operation and especially when digital circuits of high complexity are to be characterized. Other methods based on shift registers at inputs and outputs can be used to test digital circuits more precisely [8,9]. Shift registers have an advantage, that measurements can be performed at high speed using a high speed clock while the read-out/loading is done at low speed.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A high frequency test bench for rapid single-flux-quantum circuits

Engseth¹,

Intiso²,

Rafique³

et al. 2006

Supercond. Sci. Technol.

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We have designed and experimentally verified a test bench for high frequency testing of rapid single-flux-quantum (RSFQ) circuits. This test bench uses an external tunable clock signal that is stable in amplitude, phase and frequency. The high frequency external clock reads out the clock pattern stored in a long shift register. The clock pattern is consequently shifted out at high speed and split to feed both the circuit under test and an additional shift register in the test bench for later verification at low speed. This method can be employed for reliable high speed verification of RSFQ circuit operation, with use of only low speed read-out electronics. The test bench consists of 158 Josephson junctions and the occupied area is 3300 × 660 µm2. It was experimentally verified up to 33 GHz with ± 21.7% margins on the global bias supply current.

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Section: High Frequency Test Benchmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A high frequency test bench for rapid single-flux-quantum circuits

Engseth¹,

Intiso²,

Rafique³

et al. 2006

Supercond. Sci. Technol.

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show abstract

“…Rochester University has designed 4-bit decimation filter for use up to 11 GHz for an oversampling ADC. [38] They have tested components including a clock ring at 10 GHz with essentially zero error rate. The Hypres ADC system is a phase modulation-demodulation architecture in which they measured, at kilohertz frequencies, linearity in excess of 16 bits and a spur-free dynamic range over 108 dB.…”

Section: Rapid Single Flux Quantum (Rsfq) Logicmentioning

confidence: 99%

Superconductor electronics, 1986-1996

Duzer

1997

IEEE Trans. Appl. Supercond.

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This paper reviews progress in superconductor electronics over the decade since the discovery of the high temperature oxide superconductors (HTS). Almost simultaneously with that discovery was the development of a new process for low temperature superconductor (LTS) devices based on the Nb/AlOx/Nb whole wafer tunnel junction. Both of these developments facilitated a strong growth in applications. We review first the applications based on thin films with no Josephson junctions. This is mostly using HTS, which permits more convenient cooling thus making applications more commercially viable. With their need for only one or two Josephson junctions, SQUID magnetometers have succeeded to the market place using H71s materials. Finally, we review progress in the volt standard and digital circuits, both of which require large numbers of junctions and at present can only be realized with LTS materials.

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“…Therefore, developing efficient and appropriate verification techniques for SFQ devices is necessary to reduce verification time and accelerate the process of finding bugs in SFQ circuit designs [6]. Previously developed verification techniques for SFQ circuits include formal verification with delay-based time frame modeling [7] and simulation-based verification using random high-speed testing [8], but to the best of our knowledge, none have focused on the third type of verification -semi-formal verification.…”

Section: Introductionmentioning

confidence: 99%

VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology

Wong

Sun

et al. 2019

20th International Symposium on Quality Electronic Design (ISQED)

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In this paper, we propose a semi-formal verification framework for single-flux quantum (SFQ) circuits called VeriSFQ, using the Universal Verification Methodology (UVM) standard. The considered SFQ technology is superconducting digital electronic devices that operate at cryogenic temperatures with active circuit elements called the Josephson junction, which operate at high switching speeds and low switching energy -allowing SFQ circuits to operate at frequencies over 300 gigahertz. Due to key differences between SFQ and CMOS logic, verification techniques for the former are not as advanced as the latter. Thus, it is crucial to develop efficient verification techniques as the complexity of SFQ circuits scales. The VeriSFQ framework focuses on verifying the key circuit and gate-level properties of SFQ logic: fanout, gate-level pipeline, path balancing, and inputto-output latency. The combinational circuits considered in analyzing the performance of VeriSFQ are: Kogge-Stone adders (KSA), array multipliers, integer dividers, and select ISCAS'85 combinational benchmark circuits. Methods of introducing bugs into SFQ circuit designs for verification detection were experimented with -including stuck-at faults, fanout errors, unbalanced paths, and functional bugs like incorrect logic gates. In addition, we propose an SFQ verification benchmark consisting of combinational SFQ circuits that exemplify SFQ logic properties and present the performance of the VeriSFQ framework on these benchmark circuits. The portability and reusability of the UVM standard allows the VeriSFQ framework to serve as a foundation for future SFQ semi-formal verification techniques.

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High speed testing of a four-bit RSFQ decimation digital filter

Cited by 18 publications

References 15 publications

A high frequency test bench for rapid single-flux-quantum circuits

A high frequency test bench for rapid single-flux-quantum circuits

Superconductor electronics, 1986-1996

VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology

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