A high frequency test bench for rapid single-flux-quantum circuits

Abstract

We have designed and experimentally verified a test bench for high frequency testing of rapid single-flux-quantum (RSFQ) circuits. This test bench uses an external tunable clock signal that is stable in amplitude, phase and frequency. The high frequency external clock reads out the clock pattern stored in a long shift register. The clock pattern is consequently shifted out at high speed and split to feed both the circuit under test and an additional shift register in the test bench for later verification at low speed. This method can be employed for reliable high speed verification of RSFQ circuit operation, with use of only low speed read-out electronics. The test bench consists of 158 Josephson junctions and the occupied area is 3300 × 660 µm2. It was experimentally verified up to 33 GHz with ± 21.7% margins on the global bias supply current.

Digital circuits using self-shunted Nb/NbxSi1−x/Nb Josephson junctions

“…At the optimum designed bias current of 8.2 mA all circuits showed correct operation with the same experimental bias current margins of about ± 30 %. The measured margins agree with simulated results and are larger than the reported margins of ± 23 % for similar devices based on AlO x -barrier junctions [16]. The broader operating margins can be attributed to smaller spread in the NbSi junction properties.…”

Room Temperature Interface for RSFQ Digital Signal Processor

“…5(a). Taking into account input signal level acceptable for the DC/SFQ converter, the interface is expected to operate up to 40 dB of damping that corresponds to 33 GHz input clock rate [9].…”