High speed multiplier using Nikhilam Sutra algorithm of Vedic mathematics

Time efficient signed Vedic multiplier using redundant binary representation

“…The larger calculation is reduced to a smaller calculation by using the algorithms of Vedic mathematics [7]. Many significant amount of works has been published using the concept of Vedic mathematics, obtaining efficient multiplier, divider, squaring and cube architectures [8–19]. The controversies regarding the book ‘Vedic mathematics’ is mainly associated to the term ‘Vedic’ and its origin.…”

“…Sethi and Panda [9], claim efficiency in delay and device utilisation as compared with booth multiplier and square unit reported in [8]. A time efficient multiplier architecture using Nikhilam sutra of Vedic mathematics is reported in [10]. The efficiency of multiplier [10] is based on the two factors (i) larger operation is reduced to the smaller operation (ii) the speed of addition operation in accumulation of PPs is increased using CS adders.…”

“…A time efficient multiplier architecture using Nikhilam sutra of Vedic mathematics is reported in [10]. The efficiency of multiplier [10] is based on the two factors (i) larger operation is reduced to the smaller operation (ii) the speed of addition operation in accumulation of PPs is increased using CS adders. The multiplier architecture is found to be efficient as compared with the state‐of‐the‐art Vedic multipliers and straightforward CSA multiplier.…”

“…In recent time, apart from multiplier architecture [10], we have worked on dedicated and efficient square and cube architectures using algorithms of Vedic mathematics [13, 14]. These proposed designs convert the square or cube of a large magnitude number into a smaller magnitude number along with some arithmetic operation.…”

A Novel Vedic Divider Architecture with Reduced Delay for VLSI Applications

“…Now days digitization plays a vital role in the designing of processor, ALU unit [1] has greatest importance. In design of processor arithmetic units are always based on addition, substraction, multiplication [2] division operations. Out of all these operations there are a lot of scientific papers are present based on hardware implementation of addition & multiplication operation.…”