High quality silicon-based substrates for microwave and millimeter wave passive circuits

Belaroussi, Y.; Rack, Martin; Saadi, Abdelhalim A.; Scheen, Gilles; Belaroussi, M.T.; Trabelsi, Mohamed; Raskin, Jean‐Pierre

doi:10.1016/j.sse.2017.06.028

Cited by 10 publications

(3 citation statements)

References 25 publications

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“…Contrary to our previous papers where we have focused on substrate electrical performances, [19][20][21]…”

Section: Introductionmentioning

confidence: 80%

“…The latter provides the highest RF electrical performances, with very strong linearity, low relative effective permittivity (3.5), and high effective resistivity (5 kΩ·cm), it maintains its high performance all the way up to 175°C. Thus, the PSi‐S substrate can be considered for the integration of high quality passives devices (results to be found in Belaroussi et al 20 ).…”

Section: Resultsmentioning

confidence: 99%

“…Contrary to our previous papers where we have focused on substrate electrical performances, 19–21 in this article, we figure out the structural and mechanical properties of PSi substrates, these characterizations are undertaken with the aim of better adapting the porosification parameters in the idea of integrating the PSi with the standard processes of the industry. So we have investigated the nanomechanical properties and the structure analysis of the PSi layer with different thicknesses formed on p‐type Si substrate with two resistivities.…”

Section: Introductionmentioning

confidence: 99%

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Structural and nanomechanical properties of porous silicon: Cheap substrate for CMOS process industry

Belaroussi

Scheen

Saadi³

et al. 2020

Surface & Interface Analysis

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The surface topology of porous silicon (PSi) is a relevant parameter that decides the compatibility of such substrate with CMOS process. Using standard resistivity (1–10 Ω·cm) of Si substrate to fabricate PSi‐S is a low cost solution for the industry. In this paper, through an atomic force microscopy (AFM) analysis, the root mean square (RMS) roughness, the power spectral density and the correlation length were determined for different PSi layers. Furthermore, the measured hardness, Young's modulus, and stress have been made for different thicknesses of PSi: 5, 10, 50, and 200 μm. The obtained results demonstrated that very interesting properties have been achieved with the 50 μm‐thick PSi‐S layer with a maximum porosity around 65%, a surface roughness less than 1 nm and a hardness value of (~1 GPa). The realized results encourage the utilization the PSi‐based substrate into the industry process and thus the development of a Systems‐on‐Chip (SoC).

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“…Contrary to our previous papers where we have focused on substrate electrical performances, [19][20][21]…”

Section: Introductionmentioning

confidence: 80%

Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation