High-${Q}$  Variable Pitch Spiral Inductors for Increased Inductance Density and Figure-of-Merit

Tayenjam, Sobhana; Vanukuru, Venkata Narayana Rao; Sundaram, Kumaravel

doi:10.1109/ted.2019.2937671

Cited by 12 publications

(4 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Tapering is geometry modification based on varying width of metal paths [2] with respect to generated magnetic field around the integrated inductor. Time-varying magnetic field induces eddy currents back into the structure and causes inhomogeneity of current density in each metal path.…”

Section: Taperingmentioning

confidence: 99%

Fully Integrated Multi-layer Stacked Structure of Integrated Inductor with Patterned Ground Shield

Robert

Kovac

Maljar

et al. 2022

2022 18th Biennial Baltic Electronics Conference (BEC)

View full text Add to dashboard Cite

In this work, we propose fully integrated multilayer stacked topology of asymmetrical inductor with patterned ground shield (PGS), which also serves as capacitor. The main aim of the study is efficient usage of limited chip area for integrated passive components by challenging layout properties of asymmetrical integrated inductor and integrated MOS capacitor and enhancing their main electrical properties. Several principles of geometry modifications(vertical and horizontal parallelization, slicing, tapering, equal path lengths) were applied to a four-turn octagonal asymmetrical integrated inductor with the series DC resistance RL = 1.75 Ω and inductance L = 11.66 nH on low frequencies. Remaining area under integrated inductor was used for a capacitor with capacitance CP GS = 1.6 nF and the equivalent series resistance RC = 7.25 Ω. The whole structure was designed in a standard 65nm CMOS technology for use in a switched DC-DC power converter working in MHz-range for a Photovoltaic (PV) Energy Harvester (EH).

show abstract

Section: Taperingmentioning

confidence: 99%

Fully Integrated Multi-layer Stacked Structure of Integrated Inductor with Patterned Ground Shield

Robert

Kovac

Maljar

et al. 2022

2022 18th Biennial Baltic Electronics Conference (BEC)

View full text Add to dashboard Cite

show abstract

“…Hence, it is recommended to use the proposed multipath differential fractal inductor for these wireless applications. A unique parameter known as a figure of merit (FOM) (Tayenjam et al, 2019) is specified in equation ( 12) to compare the performance of the proposed inductor with different inductors in the literature. Table 2 demonstrates that the proposed inductor has a higher FOM of 4.59 compared to state-of-the-art inductors.…”

Section: Design and Simulation Of The Proposed Multipath Differential...mentioning

confidence: 99%

High-quality factor multipath differential fractal inductor for wireless applications

Tumma

Nistala

2021

View full text Add to dashboard Cite

Purpose The purpose of this study is to develop a high-quality factor fractal inductor for wireless applications such as satellite, WLAN, Bluetooth, microwave, radar and cellular phone. Design/methodology/approach The Hilbert fractal curve is used in the implementation of the proposed inductor. In the proposed inductor, the metal width has split into multiple paths based on the skin depth of the metal. The simulations of the proposed inductor are performed in 180 nm CMOS technology using the Advanced Design System EM simulator. Findings The multipath technique reduces the skin effects and proximity effects, which, in turn, decreases the series resistance of the inductor and attains high-quality factor over conventional fractal inductor for the equal on-chip area. Research limitations/implications The width of the path has chosen higher than the skin depth of the metal for a required operating frequency. Due to cost constraints, the manufacturing of the proposed fractal inductor is limited to a single layer. Practical implications The proposed inductor will be useful for the implementation of critical building blocks of radio frequency integrated circuits and monolithic microwave integrated circuits such as low-noise amplifiers, voltage-controlled oscillators, mixers, filters and power amplifiers. Originality/value This paper presents for the first time the use of a multipath technique for the fractal inductors to enhance the quality factor.

show abstract

“…Due to the induced eddy current, the net current distribution on the metal strip concentrates on the inner edge of the strip and, thus, increases the metal resistance. To mitigate the influence of the eddy current, inductor designs with variable line widths and/or line spacing layouts have been presented [14][15][16][17][18][19][20][21][22][23][24][25]. Figure 1 shows the layout of a spiral inductor with a variable line width design.…”

Section: Introductionmentioning

confidence: 99%

“…Refs. [16][17][18][19][20]22,24] analyzed numerous spirals with different geometrical parameters and performed data comparison to obtain the design results. Refs.…”

Section: Introductionmentioning

confidence: 99%

Analytic Design of on-Chip Spiral Inductor with Variable Line Width

Chen¹,

Hsu²

2022

Electronics

View full text Add to dashboard Cite

On-chip spiral inductors with variable line width layouts are known for their high quality factor (Q-factor). In this paper, we present an analytical approach to facilitate the design of such inductors. Based on an analysis of ohmic and eddy-current losses, we first derive an analytical formula for the metal resistance calculation of a spiral inductor. By minimizing the metal resistance, a simple design equation for finding the proper line width of each coil is then presented. Several 0.18 μm CMOS spiral inductors are investigated, via electromagnetic simulations and experimental studies, to test the proposed resistance calculation, as well as the variable line width design method. It is found that the developed resistance calculation can effectively model the metal-line resistance of a spiral inductor. Moreover, the inductor with a variable line width obtained using the proposed method can significantly improve the Q-factor with little compromise to inductance, which validates the capacity of the developed variable line width design technique. Since the proposed approach can be carried out using analytical calculations, it may be a more efficient design method than those previously reported in the literature.

show abstract

High-${Q}$ Variable Pitch Spiral Inductors for Increased Inductance Density and Figure-of-Merit

Cited by 12 publications

References 24 publications

Fully Integrated Multi-layer Stacked Structure of Integrated Inductor with Patterned Ground Shield

Fully Integrated Multi-layer Stacked Structure of Integrated Inductor with Patterned Ground Shield

High-quality factor multipath differential fractal inductor for wireless applications

Analytic Design of on-Chip Spiral Inductor with Variable Line Width

Contact Info

Product

Resources

About