The value of a high performance thin silicon solar cell is based on high open circuit voltage (Voc) which is highly dependent upon surface and interface recombination. A microelectronic approach with the series and parallel fabrication of different device structures is presented. This approach includes the fabrication of planar solar cells based on different solar cell designs that maximize Voc. Subsequently, using the same solar cell design, more advanced epitaxial growth test structures were fabricated on the same substrate to understand recombination losses and Voc. In high performance thin silicon solar cells, Voc is highly sensitive to surface recombination. Achieving a good surface and interface passivation in epitaxial silicon solar cells is a challenge, especially for the absorber back surface. In this work, we used test structures embedded in the solar cells to independently optimize Voc and the back surface of a thin epitaxial absorber as well as other silicon interfaces. Most epitaxial thin silicon solar cells are fabricated with in-situ processes that lead to difficulties in the independent optimization of such surfaces.To contribute to the design space in thin silicon solar cells, we tested basic device designs and test structures that lead to high Voc. The design of basic structures is important to measure parameters that limit voltage. This is a diagnostic tool for the fabrication of high performance thin silicon solar cells. This work reports device results that exhibit a path to high open circuit voltage, determined by device design, interface recombination, and bulk lifetime. With independent optimization of parameters that limit Voc and therefore performance, this work contributes to the understanding of thin silicon solar cells.