CdTe is one of the leading materials used in solar photovoltaics. However, the maximum reported CdTe cell efficiencies are considerably lower than the theoretically expected efficiencies for the ∼1.48 eV CdTe band gap. We report a class of single crystal CdTe-based solar cells grown epitaxially on crystalline Si that show promise for enhancing the efficiency and greatly lowering the cost per watt of single-junction and multijunction solar cells. The current-voltage results for our CdZnTe on Si solar cells show open-circuit voltages significantly higher than previously reported for any II-VI cells and as close to the thermodynamic limit as the best III-V-based cells.

High concentration photovoltaic (HCPV) systems offer the highest photovoltaic (PV) conversion efficiencies. Also, as production is beginning to ramp up, HCPV is becoming cost competitive with thin-film poly-CdTe and crystalline Si systems in high solar insolation regions. High solar concentrations, X ∼ 500, are used to increase cell efficiencies and greatly reduce the cell area per unit of incident solar radiation, thereby greatly reducing the cell cost per watt. The monolithic three-junction (3J) solar cells presently used in HCPV systems typically consist of two epitaxial III-V homojunctions, such as GaInP and GaInAs, grown on an active Ge substrate by metal-organic chemical vapor deposition (MOCVD). The III-V bandgaps are chosen to match the currents generated in each junction and minimize the energy lost to thermalization of the electron-hole pairs generated, subject to the constraint of approximate lattice matching. We propose using cells consisting of one or more CdTe-based II-VI homojunctions grown on large-area active Si substrates by high-throughput MBE or a less expensive high-vacuum deposition technique as an alternative to III-V based multijunction cells grown by MOCVD. The bandgap of Si is more optimal than that of Ge for two-junction (2J) or 3J cells, and lattice mismatches affect the efficiencies of such cells only slightly, which allows greater freedom in the choice of bandgaps, and thus the potential for higher efficiencies. Also, such cells could be manufactured at a much lower cost due to the larger area, much lower cost and superior mechanical properties of Si substrates as compared to Ge substrates. The much lower cell cost also would enable medium concentration PV systems that would require more cell area, but with simplified, less expensive tracking and optics, resulting in lower overall system costs. Promising initial results from material-property measurements and single-junction and 2J CdZnTe/Si cell characterization results are given. Both the promise of the proposed technology and the challenges it faces are discussed.

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High open circuit voltage Noe} is a potential benefit of thin silicon solar cells. A new thin silicon solar cell structure is proposed using silicon-on-insulator (Sal) technology that investigates the properties of high voltage in thin silicon designs with an epitaxial emitter. Key design parameters are low rear and front surface recombination, low dark current and efficient light trapping. We propose a patterned emitter area on a sal substrate. The advantages of this design are the passivation properties embedded in the buried oxide and the reduced junction area. With a uniform epitaxial emitter, the top contact shadowing can be designed to be 0%. Preliminary results show Voe >525mV and Jse>20mA/cm2 with_anti-reflection coating.This represents a substantial increase from previous work by . This present design also demonstrates the effect of a smaller emitter area and reports higher performance parameters for reported silicon cells fabricated on sal substrates.

Thin Si solar cell with epitaxial lateral overgrowth (ELO) structure described in this paper should demonstrate higher voltage. PC-1D program has been used to study the open circuit voltage and efficiency as a function of the thin Si thickness and light trapping. According to the simulation results, high voltage can be obtained even without light trapping on the backside of the thin Si layer. Thin n type silicon layer has been grown on p+ Si substrate using the method of epitaxial lateral overgrowth by CVD. The scanning electron microscopy (SEM) has been used to show the dimension of the pn junction region and light generation region after the n type Si growth.

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