High-Performance Nanowire TFTs With Metal-Induced Lateral Crystallized Poly-Si Channels

Huang

IEEE Electron Device Lett.

et al. 2009

We have investigated the characteristics of gate-allaround (GAA) twin polycrystalline-silicon nanowire (NW) thinfilm transistors (TFTs). The NW channel and surrounding gate imparted the GAA twin NW TFT with superior channel controllability. Moreover, the combination of the high surface-to-volume ratio of the NW and the split channel structure led to highly efficient NH 3 plasma treatment, which reduced the effective grainboundary trap-state density. The GAA twin NW TFT exhibited greatly improved electrical performance, including a lower threshold voltage, a steeper subthreshold swing (114 mV/dec), a higher on/off current ratio (> 10 8 ), and a virtual absence of draininduced barrier lowering (13 mV/V). Index Terms-Gate-all-around (GAA), nanowire (NW), plasma treatment, short-channel effects (SCEs), thin-film transistor (TFT).

Section: Introductionmentioning

confidence: 99%

“…Only few research works discussed these considerations [6], [12], [13]. Furthermore, the spacer patterning technique was adopted for linewidth uniformity and controllability without using expensive advance lithographic tools [7], [9].…”

Section: Introductionmentioning

confidence: 99%

Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors

Huang

IEEE Electron Device Lett.

et al. 2009

“…Recently, high performance poly-Si nanowire (NW) TFTs have been fabricated by nickel-metal induced lateral crystallization (NILC) (2)(3). Since NILC grain could be formed parallel to the channel direction, it becomes feasible to form Si NWs with nearly monocrystalline structures (4).…”

Section: Introductionmentioning

confidence: 99%

Improved Performance of NILC Poly-Si Nanowire TFTs by Using Ni-Gettering

Wang

Yang

Wu³

et al. 2010

ECS Trans.

Nickel contamination inside nickel-metal induced lateral crystallization polycrystalline silicon is an issue to fabricate high performance nanowire thin film transistors. The phosphorousdoped Į-Si/chem-SiO 2 films were employed as Ni-gettering layers to investigate effect of Ni residues on the performance of NILC poly-Si NW TFTs. It was found that the performance of NW TFTs was greatly improved after Ni-gettering process.

ECS J. Solid State Sci. Technol.

“…1 For MILC, nickel reacts with amorphous silicon (α-Si) to form nickel disilicide and the lateral transport of Ni induces crystallization of the adjacent amorphous silicon, 2,3 creating a crystallized region with low Ni contamination suitable for high performance transistors. 4 In most published work, the Ni is defined either by a lift-off process [5][6][7][8][9] or by Ni deposition in a window opened in a cap layer, which is normally deposited silicon dioxide.…”

mentioning

confidence: 99%

“…Metal-induced lateral crystallization (MILC) has been widely researched as an alternative to solid-phase crystallization (SPC) of amorphous silicon because of its lower process temperature and higher quality polysilicon (poly-Si) film with higher carrier mobility, larger grain size, and lower defect density. 1 For MILC, nickel reacts with amorphous silicon (α-Si) to form nickel disilicide and the lateral transport of Ni induces crystallization of the adjacent amorphous silicon, 2,3 creating a crystallized region with low Ni contamination suitable for high performance transistors. 4 In most published work, the Ni is defined either by a lift-off process [5][6][7][8][9] or by Ni deposition in a window opened in a cap layer, which is normally deposited silicon dioxide.…”

mentioning

confidence: 99%

Effect of an Oxide Cap Layer and Fluorine Implantation on the Metal-Induced Lateral Crystallization of Amorphous Silicon

Hakim

Gunn

Ashburn

2012

In this work, we investigate the effect of oxide cap layer on the metal-induced lateral crystallization (MILC) of amorphous silicon. The MILC is characterized at temperatures in the range 550 to 428 • C using Nomarski optical microscopy and Raman spectroscopy. It is shown that better lateral crystallization is obtained when the oxide cap layer is omitted, with the crystallization length increasing by 33% for a 15 hour anneal at 550 • C. A smaller increase of about 10% is seen at lower temperatures between 525 • C and 475 • C and no increase is seen below 450 • C. It is also shown that the detrimental effect of the oxide cap layer can be dramatically reduced by giving samples a fluorine implant prior to the MILC anneal. Raman spectroscopy shows that random grain growth is significantly less for unimplanted samples without an oxide cap and also for fluorine implanted samples both with and without an oxide cap. The crystallization length improvement for samples without an oxide cap layer is explained by the elimination of random grain crystallization at the interface between the amorphous silicon and the oxide cap layer. Metal-induced lateral crystallization (MILC) has been widely researched as an alternative to solid-phase crystallization (SPC) of amorphous silicon because of its lower process temperature and higher quality polysilicon (poly-Si) film with higher carrier mobility, larger grain size, and lower defect density.1 For MILC, nickel reacts with amorphous silicon (α-Si) to form nickel disilicide and the lateral transport of Ni induces crystallization of the adjacent amorphous silicon, 2,3 creating a crystallized region with low Ni contamination suitable for high performance transistors. 4 In most published work, the Ni is defined either by a lift-off process [5][6][7][8][9] or by Ni deposition in a window opened in a cap layer, which is normally deposited silicon dioxide. 10-15So far, no work has been reported that compares the effect of these two different Ni definition techniques on the lateral crystallization.In this paper, we study the effect of an oxide cap layer on the nickel-induced lateral crystallization of amorphous silicon, and show that an amorphous silicon film without oxide capping gives better lateral crystallization at temperatures between 475• C to 550• C. It is also shown that the detrimental effects of an oxide cap layer can be eliminated using a fluorine implant. Experimental ProcedureThe sample structures are shown schematically in Figs. 1a and 1b for Ni patterning by lift-off and oxide window definition, respectively. A 500 nm thermal silicon dioxide layer was grown on <100> n-type Si wafers, and a 110 nm amorphous silicon (α-Si) layer was then deposited using low pressure chemical vapor deposition (LPCVD) at 560• C. After deposition, some wafers were then implanted with fluorine at a dose of 2.5 × 10 15 cm −2 and an energy of 35 keV. After a short HF dip to remove any native oxide on the α-Si surface, a 20 nm Ni layer was deposited on a F implanted wafer and an unimplanted wafer and ...