Patterned sapphire substrate (PSS) has been used to improve both internal quantum efficiency (IQE) and light extraction efficiency (LEE) of GaN-based light-emitting diodes (LEDs). In this study, two kinds of periodic triangle pyramidal array PSSs were fabricated by wet etching. (1) "CPSS" was pyramid with a flat top c-plane, and (2) "OPSS" was pyramid with an oxide-covered top c-plane. It was found that the output power of OPSS was 29.0 mW, which was 6.2% higher than that of CPSS. This is because the GaN lateral growth area of OPSS was higher than that of CPSS.Light-emitting diodes (LEDs) are expected to play an important role in next-generation light source due to their advantages of high efficiency, long life, small size, environmental protection, various colors and wide applications. In particular, high-brightness GaN-based LEDs have attracted considerable attention for white light solid-state lighting. Many techniques have been developed for improving GaN-based LEDs internal quantum efficiency (IQE) and light extraction efficiency (LEE), such as epitaxial lateral overgrowth, surface roughing, metal mirror reflect layer and patterned sapphire substrate (PSS). Currently, the PSS technique has attracted much attention for its high production yield. Besides, using the PSS technique can improve both IQE and LEE. [1][2][3][4] In this work, PSS with an oxide-covered top c-plane was proposed to enhance the performance of PSS LEDs.
ExperimentalTwo kinds of periodic triangle pyramidal array PSSs were employed to grow GaN-based LEDs. Samples designated as (1) "CPSS" were pyramid with a flat top c-plane, and (2) "OPSS" were pyramid with an oxide-covered top c-plane. They were schematically illustrated in Fig. 1.To fabricate OPSS, sapphire substrate with periodic patterns (2-m diameter and 2.5-m spacing) were prepared by standard photolithography. A 200-nm-thick SiO 2 film served as the wet-etching hard mask and was deposited on the sapphire surface using the plasma-enhanced chemical vapor deposition (PECVD). The photoresist pattern was used as the mask, and the buffer-oxide etching (BOE) solution was utilized to etch SiO 2 to get SiO 2 mask. Samples were then etched in hot H 3 PO 4 -based solutions. 5,6 As for the CPSS, CPSS was dipped into BOE to remove the SiO 2 on the c-plane.The confocal microscope was employed to measure the pattern size of PSSs. The structure comprises of a triangle pyramid covered with a flat top (0001) c-plane. 7 As shown in Fig. 1 and Table I, the height of patterns was 1.4 m, and the diameter of top c-plane was 1.0 m.After the clean process, the LED structures were grown by metalorganic chemical vapor deposition (MOCVD). The LED structures and growth temperature were consist of a p-type Mg-doped GaN at 950 C, an InGaN-GaN MQW with six pair of InGaN (3 nm)/GaN (9 nm) at 800 C, a 2 m-thick n-type Si-doped GaN at 1050 C, a 2 m -thick undoped GaN layer film at 1050 C and buffer layer at 550 C on PSSs.The device mesa with a chip size of 300 Â 300 m 2 was then defined by inductively coupled plasma (I...