High-Performance Flexible Thin-Film Transistors Exfoliated from Bulk Wafer

Abstract

Mechanically flexible integrated circuits (ICs) have gained increasing attention in recent years with emerging markets in portable electronics. Although a number of thin-film-transistor (TFT) IC solutions have been reported, challenges still remain for the fabrication of inexpensive, high-performance flexible devices. We report a simple and straightforward solution: mechanically exfoliating a thin Si film containing ICs. Transistors and circuits can be prefabricated on bulk silicon wafer with the conventional complementary metal-oxide-semiconductor (CMOS) process flow without additional temperature or process limitations. The short channel MOSFETs exhibit similar electrical performance before and after exfoliation. This exfoliation process also provides a fast and economical approach to producing thinned silicon wafers, which is a key enabler for three-dimensional (3D) silicon integration based on Through Silicon Vias (TSVs).

Piezoelectric Thick Film Based on Bonding technologies for Energy Harvester

“…(31) Moreover, the thickness of the exfoliated PMN-PT can be easily controlled by modulating the residual stress of the Ni film. (33) The freestanding thin PMN-PT film on a thin plastic substrate was sufficiently flexible to conform to achieve conformal contact on a curved subcutaneous layer and corrugated organs in the human body, thus making it possible to generate energy in the human body by slight mechanical movements. (34) Meanwhile, in order to enhance the conversion efficiency of energy harvesters, researchers have demonstrated an inherently high-piezoelectric-coefficient perovskite thin film on a plastic substrate using a soft-lithographic transfer technique, enabling high-quality thin-film materials on a flexible substrate.…”

“…(13) A 1-μm-thick PZT film was deposited by spin coating and its structure was analyzed by X-ray diffraction. (14) A 5 μm PZT film for d 31 and d 33 mode MEMS generators was prepared by an aerosol deposition process. (23) The fabricated device under the d 31 mode generated a maximum output power of 2.765 μW at 255.9 Hz at an acceleration of 2.5g.…”

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

“…Although some recent process techniques have used nickel deposition based strain engineering to exfoliate silicon chips (with devices) and they show promising electrical results [62][63][64][65][66][67] , they are cost exhaustive (using ultra-thin body SOI, high energy implantation), opaque, and they suffer from nickel removal process related damage. Ultra-thin flexible silicon wafers are expensive, have more defects than usual device grade wafers, because of their ultra-thin nature during high thermal budget they are strained and deformed, require extra-ordinary care even in the clean room environment to handle them.…”

CMOS technology: a critical enabler for free-form electronics-based killer applications

“…Finally they are highly expensive. Buffered substrates like silicon-oninsulator (SOI) (including ultra-thin and extremely-thin: UT/ETSOI) can provide high quality sophisticated ultra-scaled electronics [39][40][41] by removing the buffer layer (most often buffer oxide) but they are far more expensive than that of bulk mono-crystalline silicon (100) which is used for 90% of the silicon electronics manufacturing. Alternate orientation silicon substrates can be used like Si (110) or Si (111) 42 .…”