2010 International Electron Devices Meeting 2010
DOI: 10.1109/iedm.2010.5703312
|View full text |Cite
|
Sign up to set email alerts
|

High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3

Citation Types

1
87
0
1

Year Published

2012
2012
2019
2019

Publication Types

Select...
8
2

Relationship

0
10

Authors

Journals

citations
Cited by 96 publications
(89 citation statements)
references
References 4 publications
1
87
0
1
Order By: Relevance
“…Refs. [15][16][17][18][19][20][21][22]. The valence band offset determines the threshold voltage and gate-to-channel capacitance of such devices.…”
Section: Introductionmentioning
confidence: 99%
“…Refs. [15][16][17][18][19][20][21][22]. The valence band offset determines the threshold voltage and gate-to-channel capacitance of such devices.…”
Section: Introductionmentioning
confidence: 99%
“…One enticing approach is to replace the Si channel with high intrinsic hole mobility Ge for p-channel device compared to III-V p-channel material. [8][9][10] Alternative approaches are different surface orientations to improve the carrier mobility, [11][12][13][14] strain engineering, 11,15,16 device architecture, 8,9,17 and optimal channel direction. [19][20][21][22][23] Research efforts are currently devoted towards investigation of the Ge as channel material, since higher intrinsic carrier mobility of Ge can provide a larger drive current, and its smaller bandgap can enable operation at a lower voltages.…”
Section: Introductionmentioning
confidence: 99%
“…1 One attractive approach is to replace the Si channel with high intrinsic hole mobility Ge for p-channel and low effective carrier mass III-V material for n-channel material. [2][3][4][5] Alternative approach is different surface orientations to improve carrier mobility [6][7][8][9] and optimal channel direction for device speed. [10][11][12][13][14] Recently, semiconductor industry was replaced SiO 2 gate oxide by hafnium-based gate dielectric on Si complementary metal oxide semiconductor (CMOS) technology and demonstrated superior microprocessor performance compared to SiO 2 gate oxide.…”
Section: Introductionmentioning
confidence: 99%