International Conference onIndium Phosphide and Related Materials, 2003.
DOI: 10.1109/iciprm.2003.1205305
|View full text |Cite
|
Sign up to set email alerts
|

High indium content metamorphic (In,Al)As/(In,Ga)As heterojunction bipolar transistors

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2

Citation Types

0
5
0

Publication Types

Select...
3
3

Relationship

1
5

Authors

Journals

citations
Cited by 6 publications
(5 citation statements)
references
References 6 publications
0
5
0
Order By: Relevance
“…5 Even with the vertical dimensions of the devices discussed here, high speed was already achieved. This 6.00 Å SHBT Gummel plot exhibits dc gain ͑␤͒ near 40.…”
Section: Resultsmentioning
confidence: 90%
See 1 more Smart Citation
“…5 Even with the vertical dimensions of the devices discussed here, high speed was already achieved. This 6.00 Å SHBT Gummel plot exhibits dc gain ͑␤͒ near 40.…”
Section: Resultsmentioning
confidence: 90%
“…The typical dimensions of this cross-hatch are a rms roughness of 5 nm at the top of the buffer ͑as measured over 80ϫ80 m 2 ͒ and a lateral distance between adjacent valleys of 3.5Ϯ1.0 m. Although these vertical and horizontal dimensions are of the same order as those of the device layer thicknesses and emitter widths, they have had no severe effects on the device fabrication or characteristics. 5 The common-emitter I -V curves for small-area ͑2ϫ10 m 2 ͒ devices of a 6.00 Å SHBT and a 6.00 Å DHBT are shown in Fig. The most significant improvement was the decrease in the base-emitter leakage current, especially significant because that also enabled the improvement achieved in dc gain.…”
Section: Resultsmentioning
confidence: 99%
“…Although other devices produced using this process have been reported with P>40 and f/fma, both greater than 150 GHz [4], the layer structure employed for the samples used in these measurements yielded somewhat lower P (20-30 maximum) and f,/fmax (60-80 GHz, without de-embedded pad parasitics). Further fabrication details are published elsewhere [4,12,13].…”
Section: Introductionmentioning
confidence: 99%
“…The graded buffer layer technique allows the engineer to tailor the end composition of the alloy semiconductor for the required device application. For microwave applications, it is undesirable to have a thick conducting buffer layer (4,5). However, with wafer bonding just the active layer can be transferred to the semi-insulating substrate.…”
Section: Introductionmentioning
confidence: 99%