2021
DOI: 10.1002/pssr.202100421
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High Hole Mobility of Polycrystalline GeSn Layers Grown by Hot‐Wire Chemical Vapor Deposition on Diamond Substrates

Abstract: The conditions for the growth of polycrystalline GeSn layers on diamond substrates are determined. The effect of the incorporation of Sn in Ge layers on their morphology, structure, and transport properties is studied. GeSn layers with a thickness of 0.5 μm, obtained by the hot‐wire chemical vapor deposition method at 300 °C without annealing, are uniform with a surface roughness of less than 1.0 nm. It is shown that the incorporation of 1% Sn into the Ge lattice makes it possible to significantly increase the… Show more

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Cited by 6 publications
(3 citation statements)
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“…Techniques for synthesizing thin films of high-mobility materials on insulating substrates have been extensively studied. Ge has been a preferred TFT channel material owing to its high carrier mobility and relatively low crystallization temperature. , The performance of metal-oxide semiconductor field-effect transistors (MOSFETs) based on single-crystal Ge (sc-Ge) has surpassed that of Si MOSFETs because of the gate stack technologies and thin-film structure. To date, polycrystalline Ge (poly-Ge) thin films have been synthesized at low temperatures using various techniques, such as solid-phase crystallization (SPC), laser annealing, chemical vapor deposition, lamp annealing, plasma irradiation, seed layer technique, and metal-induced crystallization. However, owing to the poor quality of poly-Ge, particularly in thin films (<100 nm), which are required for reducing the off-current of TFTs, the practical use of poly-Ge-based TFTs on glass has yet to be achieved.…”
Section: Introductionmentioning
confidence: 99%
“…Techniques for synthesizing thin films of high-mobility materials on insulating substrates have been extensively studied. Ge has been a preferred TFT channel material owing to its high carrier mobility and relatively low crystallization temperature. , The performance of metal-oxide semiconductor field-effect transistors (MOSFETs) based on single-crystal Ge (sc-Ge) has surpassed that of Si MOSFETs because of the gate stack technologies and thin-film structure. To date, polycrystalline Ge (poly-Ge) thin films have been synthesized at low temperatures using various techniques, such as solid-phase crystallization (SPC), laser annealing, chemical vapor deposition, lamp annealing, plasma irradiation, seed layer technique, and metal-induced crystallization. However, owing to the poor quality of poly-Ge, particularly in thin films (<100 nm), which are required for reducing the off-current of TFTs, the practical use of poly-Ge-based TFTs on glass has yet to be achieved.…”
Section: Introductionmentioning
confidence: 99%
“…Ge 1−x Sn x alloys have attracted considerable attention in Si-based optoelectronic device integration because of their enhanced carrier mobility, adjustable band gap structure and compatibility with the CMOS processes [1][2][3][4][5]. Efficient devices based on Ge 1−x Sn x have been fabricated, including thin film transistors [6][7][8][9], solar cells [10], photodetectors [11][12][13], LEDs [14][15][16][17], lasers [18,19], etc.…”
Section: Introductionmentioning
confidence: 99%
“…[36,37] The crystallization temperature was lowered, [38,39] grain size was enlarged, [40,41] p was reduced, [42] energy barrier height of the grain boundary was lowered, [43] and then hole mobility μ was enhanced. [39][40][41][42][43][44][45] However, p of the order of 10 16 cm À3 has never been achieved, which is essential for extensive Fermi level control using impurity doping. In this study, to reduce the defect-induced acceptors in poly-Ge, we investigated a combination of Sn addition and GeO 2 underlayer insertion in the SPC of the densified a-Ge layer.…”
Section: Introductionmentioning
confidence: 99%